Shift register unit, gate driving circuit, display device and driving method

A shift register unit comprising a blank input circuit, a blank pull-up circuit, a display input circuit, and an output circuit;

• wherein the blank input circuit is configured to charge a pull-up control node in response to a compensation selection control signal and hold the level of the pull-up control node;
• wherein the blank pull-up circuit is configured to charge a pull-up node by using a first clock signal under the control of the level of the pull-up control node and the first clock signal;
• wherein the display input circuit is configured to charge the pull-up node in response to a display input signal;
• wherein the output circuit is configured to output a plurality of output clock signals to a plurality of output terminals respectively under the control of the level of the pull-up node and the plurality of output clock signals;
• wherein the plurality of output terminals comprise a shift signal output terminal and a plurality of pixel signal output terminals;
• and
• wherein the plurality of pixel signal output terminals are configured to output a plurality of pixel signals to a plurality of rows of pixel units respectively.