Accelerated segmentation for reverse engineering of integrated circuits

An apparatus for segmenting a Scanning Electron Microscopy (SEM) image of an integrated circuit (IC), the apparatus comprising at least one processor and at least one memory including program code, the at least one memory and the program code configured to, with the at least one processor, cause the apparatus to at least:

• receive an SEM image for an IC;
• perform filtering and binarization of the SEM image;
• extract information associated with filter sizes for the filtering;
• extract signatures associated with a distribution for background pixels and foreground pixels of the SEM image;
• extract respective distance to mean signatures for the background pixels and the foreground pixels;
• and
• segment the SEM image based at least in part on the filter sizes and the respective distance to mean signatures to generate a segmented image for the IC.

A non-transitory computer storage medium comprising instructions for segmenting a Scanning Electron Microscopy (SEM) image of an integrated circuit (IC), the instructions being configured to cause one or more processors to at least perform operations configured to:

• receive an SEM image for an IC;
• perform filtering and binarization of the SEM image;
• extract information associated with filter sizes for the filtering;
• extract signatures associated with a distribution for background pixels and foreground pixels of the SEM image;
• extract respective distance to mean signatures for the background pixels and the foreground pixels;
• and
• segment the SEM image based at least in part on the filter sizes and the respective distance to mean signatures to generate a segmented image for the IC.