Non-adiabatic implementation of an iswap quantum logic gate

An apparatus comprising:

• a first qubit;
• a second qubit coupled to the first qubit;
• control electronics comprising one or more control devices that tune the frequency of the first qubit and second qubit through application of respective control signals,
• wherein the control electronics are configured to implement the plunge schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit, comprising:
• during a first stage, non-adiabatically driving detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel;
• during a second stage, driving detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel;
• during a third stage, allowing the first qubit and the second qubit to freely evolve and interact;
• during a fourth stage, implementing the second stage in reverse order;
• and
• during a fifth stage, implementing the first stage in reverse order.