Compile device, compile method, and non-transitory computer readable medium

A compile device comprising:

• hardware including at least one processor and at least one memory;
• a compile processing unit implemented at least by the hardware and that converts a primitive program for iteratively executing calculation processing of executing an arithmetic calculation including, as operands, an element A[i], an element A[i+1], and an element [i+2k] of an array A of a (1/2)k word type (k being a natural number) while shifting a value of a subscript i (i being an integer greater than or equal to 0) by one, into an object code,
• the compile processing unit including:
• a vector load instruction generating unit configured to generate a first vector load instruction to load a first group of data units, which is used as the element A[i] in the iterative calculation processing and has each data unit being a (1/2)k word, from a memory into a first vector register in a state of being packed in units of 1-word, as first vector data, and a second vector load instruction to load a second group of data unit, which is used as the element A[i+2k] in the iterative calculation processing, from the memory into a second vector register in a state of being packed in units of 1-word, as second vector data;
• and
• a vector shift instruction generating unit configured to generate a first vector shift double instruction to cause a part of a data string, which is obtained by shifting the first vector data and the second vector data by a (1/2)k word as a series of data string, to be stored in a third vector register in a state of being packed in units of 1-word, as third vector data corresponding to the element A[i+1].