Memory control method, memory storage device and memory control circuit unit

A memory storage device, comprising:

• a connection interface circuit configured to couple to a host system;
• a rewritable non-volatile memory module;
• and
• a memory control circuit unit, coupled to the connection interface circuit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to determine a retry threshold value according to decoding history information, and the decoding history information comprises information related to at least one first decoding operation previously performed,
• the memory control circuit unit is further configured to determine whether to enter a second decoding mode according to the retry threshold value after at least one second decoding operation performed based on a first decoding mode is failed, and
• a decoding ability of the second decoding mode is higher than a decoding ability of the first decoding mode.

A memory control circuit unit configured to control a memory storage device, wherein the memory storage device comprises a rewritable non-volatile memory module, and the memory storage device comprises:

• a host interface circuit, configured to couple to a host system;
• a memory interface circuit, configured to couple to the rewritable non-volatile memory module;
• a decoding circuit;
• and
• a memory management circuit, coupled to the host interface circuit, the memory interface circuit and the decoding circuit,
• wherein the memory management circuit is configured to determine a retry threshold value according to decoding history information, and the decoding history information comprises information related to at least one first decoding operation previously performed by the decoding circuit,
• the memory management circuit is further configured to determine whether to enter a second decoding mode according to the retry threshold value after at least one second decoding operation performed based on a first decoding mode by the decoding circuit is failed, and
• a decoding ability of the second decoding mode is higher than a decoding ability of the first decoding mode.

A memory storage device, comprising:

• a connection interface circuit configured to couple to a host system;
• a rewritable non-volatile memory module;
• and
• a memory control circuit unit, coupled to the connection interface circuit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to determine a retry threshold value as a first value and determine whether to enter a second decoding mode according to the first value after at least one third decoding mode performed based on a first decoding mode is failed,
• the memory control circuit unit is further configured to determine the retry threshold value as a second value and determine whether to enter the second decoding mode according to the second value after at least one fourth decoding mode performed based on the first decoding mode is failed,
• the first value is different from the second value, and
• a decoding ability of the second decoding mode is higher than a decoding ability of the first decoding mode.