Power factor correction circuit
AssigneesDelta Electronics (Shanghai) Co., Ltd., Zhejiang University
InventorsDehong Xu, Kai Dong, Jinfa Zhang
Life of this patent
Estimating the term…
Abstract
A power factor correction circuit includes an input power source, a first bridge arm, a second bridge arm, an output capacitor and an active clamp unit. The first bridge arm includes a first switch and a second switch in series. The second bridge arm includes a third switch and a fourth switch in series. The active clamp unit includes a second inductor, a clamp capacitor and a fifth switch. The power factor correction circuit may realize the ZVS function of the first switch and the second switch by the collaboration of the active clamp unit and the conduction/non-conducting state of the first switch, the second switch, the third switch and the fourth switch.
Claims24
A power factor correction circuit, comprising:
- an input power source;
- a first bridge arm comprising a first switch and a second switch connected in series, wherein a common node of the first switch and the second switch is electrically connected with a first terminal of the input power source through a first inductor;
- a second bridge arm, connected with the first bridge arm in parallel, comprising a third switch and a fourth switch connected in series, wherein a common node of the third switch and the fourth switch is electrically connected with a second terminal of the input power source;
- an output capacitor;
- and
- an active clamp unit comprising a second inductor, a clamp capacitor and a fifth switch, wherein a first terminal of the clamp capacitor is electrically connected with a first terminal of the second inductor, a second terminal of the clamp capacitor is electrically connected with a first terminal of the fifth switch, and a second terminal of the fifth switch is electrically connected with a second terminal of the second inductor,
- wherein the active clamp unit is disposed according to the selection from one of the three circuit arrangements below:
- positioned between a first terminal of the first bridge arm and a first terminal of the output capacitor;
- positioned between a second terminal of the first bridge arm and a second terminal of the output capacitor;
- positioned between the first switch and the second switch.
A power factor correction circuit, comprising:
- an input power source;
- a first bridge arm comprising a first switch and a second switch connected in series, wherein a common node of the first switch and the second switch is electrically connected with a first terminal of the input power source through a first inductor;
- a second bridge arm comprising a third switch and a fourth switch connected in series, wherein a common node of the third switch and the fourth switch is electrically connected with a second terminal of the input power source;
- a third bridge arm connected with the first bridge arm and the second bridge arm in parallel, wherein the third bridge arm comprises a sixth switch and a seventh switch connected in series, wherein a common node of the sixth switch and the seventh switch is electrically connected with the first terminal of the input power source through a third inductor;
- an output capacitor;
- a first active clamp unit comprising a second inductor, a first clamp capacitor and a fifth switch, wherein a first terminal of the first clamp capacitor is electrically connected with a first terminal of the second inductor, a second terminal of the first clamp capacitor is electrically connected with a first terminal of the fifth switch, and a second terminal of the fifth switch is electrically connected with a second terminal of the second inductor;
- and
- a second active clamp unit comprising a fourth inductor, a second clamp capacitor and an eighth switch, wherein a first terminal of the second clamp capacitor is electrically connected with a first terminal of the fourth inductor, a second terminal of the second clamp capacitor is electrically connected with a first terminal of the eighth switch, and a second terminal of the eighth switch is electrically connected with a second terminal of the fourth inductor,
- wherein the first active clamp unit is arranged in the first bridge arm, the second active clamp unit is arranged in the third bridge arm, and a position of the first active clamp unit in the first bridge arm and a position of the second active clamp unit in the third bridge arm are identical.
A power factor correction circuit, comprising:
- an AC power source;
- a first bridge arm comprising a first switch and a second switch connected in series, wherein a common node of the first switch and the second switch is electrically connected with a first terminal of the AC power source through a first inductor;
- a second bridge arm comprising a third switch and a fourth switch connected in series, wherein a common node of the third switch and the fourth switch is electrically connected with a second terminal of the AC power source;
- a third bridge arm connected with the first bridge arm in parallel, wherein the third bridge arm comprises a sixth switch and a seventh switch connected in series, wherein a common node of the sixth switch and the seventh switch is electrically connected with the first terminal of the AC power source through a third inductor;
- an output capacitor;
- and
- an active clamp unit comprising a second inductor, a first clamp capacitor and a fifth switch, wherein the second inductor is electrically parallel to a serially-connected structure having the first clamp capacitor and the fifth switch in series;
- wherein the first bridge arm and the third bridge arm are operated in an interleaving manner, the active clamp unit is connected between the second bridge arm and the third bridge arm, and the active clamp unit is shared by the first bridge arm and the third bridge arm.
Dependencies are inferred from the claim text.