Semiconductor device and method for fabricating the same

A semiconductor device comprising:

• a first substrate including a first surface and a second surface opposite to each other;
• a lower insulating film and an upper insulating film on the first substrate;
• a lower wiring in the lower insulating film, wherein the lower wiring is exposed at a top surface of the lower insulating film;
• a first wiring in the upper insulating film;
• a connection via in the upper insulating film, wherein the connection via extends from the first wiring to connect the first wiring to the lower wiring;
• a landing via in the upper insulating film, wherein the landing via is spaced apart from the first wiring;
• a second substrate overlapping the first substrate and including a third surface and a fourth surface opposite to the third surface;
• a second inter-wiring insulating film stacked on the second substrate;
• and
• a through via structure configured to penetrate the second substrate and the second inter-wiring insulating film, and connected to the landing via,
• wherein a top surface of the landing via is further spaced apart from the lower insulating film than a bottom surface of the first wiring, and
• wherein a bottom surface of the landing via is coplanar with a bottom surface of the connection via.

A semiconductor device comprising:

• a sensor array region;
• a connection region around the sensor array region;
• a first substrate including a first surface and a second surface opposite to each other;
• a photoelectric conversion layer in the first substrate of the sensor array region;
• a first insulating structure stacked on the first substrate;
• a first wiring in the first insulating structure of the connection region;
• a landing via in the first insulating structure of the connection region, wherein the landing via is spaced apart from the first wiring;
• a second substrate overlapping the first substrate and including a third surface and a fourth surface opposite to the third surface;
• a second insulating structure on the second substrate, wherein the second insulating structure is bonded to the first insulating structure;
• and
• a through via structure configured to penetrate the second substrate and the second insulating structure, and connected to the landing via,
• wherein with respect to the second surface of the first substrate, a top surface of the landing via is higher than a bottom surface of the first wiring, and a bottom surface of the landing via is lower than the bottom surface of the first wiring.