Wavelet System and Method for Ameliorating Misregistration and Asymmetry of Semiconductor Devices
AssigneeKLA Corporation
InventorsLilach Saltoun, Daria Negri
Life of this patent
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Abstract
A wavelet-analysis system and method for use in fabricating semiconductor device wafers, the system including a misregistration metrology tool operative to measure at least one measurement site on a wafer, thereby generating an output signal, and a wavelet-based analysis engine operative to generate at least one wavelet-transformed signal by applying at least one wavelet transformation to the output signal and generate a quality metric by analyzing the wavelet-transformed signal.
Claims23
A wavelet-analysis system for use in fabricating semiconductor device wafers, the system comprising:
- a misregistration metrology tool operative to measure at least one measurement site on a wafer, thereby generating an output signal;
- and
- a wavelet-based analysis engine operative to:
- generate at least one wavelet-transformed signal by applying at least one wavelet transformation to said output signal;
- and
- generate a quality metric by analyzing said wavelet-transformed signal.
A wavelet-analysis method of fabricating semiconductor device wafers, the method comprising:
- providing a first wafer;
- forming, using a first set of fabrication parameters, at least a first layer on said wafer;
- forming, using a second set of fabrication parameters, at least a second layer on said wafer;
- subsequently generating an output signal by measuring a measurement site on said first wafer using a misregistration metrology tool;
- generating at least one wavelet-transformed signal by applying at least one wavelet transformation to said output signal;
- generating a quality metric by analyzing said wavelet-transformed signal;
- generating at least one adjusted set of fabrication parameters by adjusting, at least partially based on said quality metric, at least one fabrication parameter, said at least one fabrication parameter being selected from at least one of said first set of fabrication parameters and or said second set of fabrication parameters;
- and
- subsequently forming at least one layer on at least one of said first wafer and a second wafer using said adjusted set of fabrication parameters.
Dependencies are inferred from the claim text.