Memory device and method of operating the same

A memory device comprising:

• a memory cell array including a plurality of memory cells connected to a plurality of word lines;
• a peripheral circuit configured to perform a program operation including a plurality of program loops each program loop including an operation of applying a program voltage to a selected word line among the plurality of word lines and a verify operation of applying some verify voltages among verify voltages respectively corresponding to target program states of the plurality of memory cells;
• and
• control logic configured to control the peripheral circuit to determine a voltage level of the some verify voltages based on the number of target program states corresponding to the some verify voltages and perform the program operation using the determined some verify voltages.

A method of operating a memory device that performs a program operation of storing data in a plurality of memory cells, the program operation including a plurality of program loops each including a program voltage application operation and a verify operation, the method comprising:

• applying a program voltage to a word line commonly connected to the plurality of memory cells;
• and
• applying, in the verify operation, verify voltages respectively increased by step voltages over verify voltages applied in a verify operation of a previous program loop;
• wherein the step voltages are determined based on the number of target program states corresponding to verify voltages to be applied to the word line and voltage levels of the verify voltages applied in the verify operation of the previous program loop.

A memory device comprising:

• a plurality of memory cells;
• a peripheral circuit configured to perform a program operation of storing data in the plurality of memory cells, wherein the program operation includes a plurality of program loops each including an operation of applying a program voltage to a selected word line commonly connected to the plurality of memory cells and a verify operation of applying at least one verify voltage among verify voltages respectively corresponding to target program states of the plurality of memory cells;
• and
• control logic configured to control the peripheral circuit so that some of at least two verify voltages applied to the selected word line have a negative voltage level and some have a positive voltage level during the verify operation.