Techniques to enable integrated circuit debug across low power states

One or more non-transitory computer-readable storage media having instructions, stored thereon, that when executed cause a device to:

• send a message to a target system in a low power state to indicate a probe type of a probe that is connected between a debug host system and the target system to trigger the target system to disable or override at least one of a clock or a power rail to one or more circuit blocks that are unrelated to a debug trace in the target system;
• and
• receive debug data from the target system according to the probe type.

One or more non-transitory computer-readable storage media having instructions, stored thereon, that when executed cause an integrated circuit to:

• receive, from a debug test system that is connected to the integrated circuit via a probe for debug of one or more low power states of the integrated circuit, an indication of a probe type of the probe and a debug use case;
• and
• control at least one of a clock setting, a power setting, or a low voltage mode setting of one or more circuit blocks of the integrated circuit based on the probe type and the debug use case.