Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof

A semiconductor structure, comprising:

• a first die comprising a three-dimensional memory device including a three-dimensional array of NAND memory elements;
• and
• a second die comprising a semiconductor substrate, a peripheral logic circuitry that includes complementary metal oxide semiconductor (CMOS) devices located on the semiconductor substrate;
• wherein:
• the first die is bonded to the second die;
• and
• gate structures of the CMOS devices of the second die are located between the three-dimensional array of NAND memory elements of the first die and the semiconductor substrate of the second die containing active regions separated by a channel of the CMOS devices.

A method of forming a semiconductor structure, comprising:

• providing a first die comprising a three-dimensional memory device including a three-dimensional array of NAND memory elements;
• providing a second die comprising a semiconductor substrate and peripheral logic circuitry that includes complementary metal oxide semiconductor (CMOS) devices located on the semiconductor substrate;
• and
• forming a bonded assembly by bonding the first die to the second die.