Semiconductor package including interposer and method of manufacturing the semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsJongbo Shim, Jihwang Kim, Choongbin Yim
Life of this patent
Estimating the term…
Abstract
A semiconductor package comprises a package substrate, a semiconductor chip on the package substrate, and an interposer substrate on the semiconductor chip. The interposer substrate comprises a first surface facing the semiconductor chip and a trench in the first surface, the trench vertically overlapping the semiconductor chip. An insulating filler is provided between the semiconductor chip and the interposer substrate, and at least partially fills the trench of the interposer substrate.
Claims25
A semiconductor package comprising:
- a package substrate;
- a semiconductor chip on the package substrate;
- an interposer substrate on the semiconductor chip, the interposer substrate comprising a first surface facing the semiconductor chip and a trench in the first surface, the trench located to vertically overlap the semiconductor chip;
- and
- an insulating filler between the semiconductor chip and the interposer substrate, the insulating filler at least partially filling the trench of the interposer substrate.
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16-17. (canceled)
A semiconductor package comprising:
- a package substrate;
- a semiconductor chip on the package substrate;
- an interposer substrate comprising a base insulating layer, a lower protection insulating layer on a lower surface of the base insulating layer facing an upper surface of the semiconductor chip, and an upper protection insulating layer on an upper surface of the base insulating layer;
- a spacer on the lower protection insulating layer and protruding from the lower protection insulating layer toward the upper surface of the semiconductor chip;
- a conductive connector extending between the package substrate and the interposer substrate and electrically connecting the package substrate to the interposer substrate;
- and
- an insulating filler between the semiconductor chip and the interposer substrate and in contact with the conductive connector and the semiconductor chip,
- wherein the lower protection insulating layer comprises a trench vertically overlapping the upper surface of the semiconductor chip and at least partially filled with the insulating filler.
A semiconductor package comprising:
- a first package substrate;
- a first semiconductor chip on the first package substrate;
- an interposer substrate on an upper surface of the first semiconductor chip, the interposer substrate comprising a first surface facing the first semiconductor chip and a trench in the first surface, the trench vertically overlapping the first semiconductor chip;
- a spacer on the first surface of the interposer substrate and contacting an upper surface of the first semiconductor chip;
- a first conductive connector extending between the first package substrate and the interposer substrate and electrically connecting the first package substrate to the interposer substrate;
- an insulating filler between the first semiconductor chip and the interposer substrate and within the trench of the interposer substrate;
- a second package substrate on the interposer substrate;
- a second semiconductor chip on the second package substrate;
- and
- a second conductive connector extending between the interposer substrate and the second package substrate and electrically connecting the interposer substrate to the second package substrate.
26-27. (canceled)
Dependencies are inferred from the claim text.