3d nand memory device and method of forming the same

A method for fabricating a semiconductor device, comprising:

• forming an initial stack of sacrificial word line layers and insulating layers that are disposed alternately over a substrate of the semiconductor device and comprise array regions and a connection region positioned between the array regions;
• forming a first staircase region in the connection region by removing a number of pairs of the sacrificial word line layers and the insulating layers in the connection region;
• forming a first staircase in the first staircase region of the connection region of the initial stack;
• and
• forming a second staircase in a second staircase region of the connection region of the initial stack, wherein
• the first staircase and the second staircase are separated by a a separation region between the first and second staircases, and
• each stair in the first staircase has a smaller height than a height of a stair in the second staircase on an opposite side of the separation region.