Semiconductor storage device

A semiconductor storage device, comprising:

• a first plane including a first memory cell array and a first data latch for temporarily storing data written to the first memory cell array and data read from the first memory cell array;
• a second plane including a second memory cell array and a second data latch for temporarily storing data written to the second memory cell array and data read from the second memory cell array;
• a peripheral circuit configured to control writing of data to the first memory cell array, writing of data to the second memory cell array, reading of data from the first memory cell array, and reading of data from the second memory cell array;
• and
• a sampling circuit configured to execute a sampling process by which sampling data is collected from a predetermined node of the peripheral circuit, during a period in which the peripheral circuit performs the writing of data to the first memory cell array or the reading of data from the first memory cell array.