Apparatuses and methods including memory and operation of same
AssigneeMicron Technology, Inc.
InventorsInnocenzo Tortorelli, Stephen Tang, Christina Papagianni
Life of this patent
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Abstract
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
Claims20
A method comprising:
- applying a write pulse having a first polarity or a second polarity to a memory cell comprising a layer configured to act as a selector device and a memory element, wherein a first state is written to the memory cell when the write pulse has the first polarity and a second state is written to the memory cell when the write pulse has the second polarity;
- and
- applying a read pulse having the first polarity to the memory cell, wherein a magnitude of the read pulse is between a first threshold voltage of the memory cell in the first state and a second threshold voltage of the memory cell in the second state.
A method comprising:
- applying a first read pulse in a first polarity to a memory cell;
- sensing a threshold voltage of the memory cell;
- determining a logic state of the memory cell based on the threshold voltage;
- and
- responsive to the logic state determined:
- applying a write pulse to the memory cell in the first polarity to write a first logic state to the memory cell or a second polarity to write a second logic state to the memory cell.
A method, comprising:
- applying a first read pulse having a first polarity to a memory cell;
- sensing a first threshold voltage;
- applying a second read pulse having the first polarity to the memory cell;
- sensing a second threshold voltage of the memory cell responsive to the second read pulse;
- calculating a difference between the first threshold voltage and the second threshold voltage;
- and
- determining the logic state of the memory cell.
Dependencies are inferred from the claim text.