Switched capacitor multiplier for compute in-memory applications

A semiconductor apparatus comprising:

• one or more substrates;
• and
• logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable logic or fixed-functionality logic hardware, the logic coupled to the one or more substrates to:
• identify whether a product of a first digital number and a second digital number is associated with a positive value or a negative value;
• during a first clock phase, set a first reference voltage to have a first value or a second value based on whether the product is associated with the positive value or the negative value;
• during the first clock phase, control a plurality of switches to supply the first reference voltage to first plates of a plurality of capacitors, wherein each of the plurality of capacitors includes a respective first plate of the first plates and a second plate;
• and
• during the first clock phase, control the plurality of switches based on the first digital number to electrically connect at least one of the second plates to the first reference voltage and electrically connect at least one of the second plates to a second reference voltage.

A method comprising:

• identifying whether a product of a first digital number and a second digital number is associated with a positive value or a negative value;
• during a first clock phase, setting a first reference voltage to have a first value or a second value based on whether the product is associated with the positive value or the negative value;
• during the first clock phase, controlling a plurality of switches to supply the first reference voltage to first plates of a plurality of capacitors, wherein each of the plurality of capacitors includes a respective first plate of the first plates and a second plate;
• and
• during the first clock phase, controlling the plurality of switches based on the first digital number to electrically connect at least one of the second plates to the first reference voltage and electrically connect at least one of the second plates to a second reference voltage.

At least one computer readable storage medium comprising a set of instructions which, when executed by a computing system, cause the computing system to:

• identify whether a product of a first digital number and a second digital number is associated with a positive value or a negative value;
• during a first clock phase, set a first reference voltage to have a first value or a second value based on whether the product is associated with the positive value or the negative value;
• during the first clock phase, control a plurality of switches to supply the first reference voltage to first plates of a plurality of capacitors, wherein each of the plurality of capacitors includes a respective first plate of the first plates and a second plate;
• and
• during the first clock phase, control the plurality of switches based on the first digital number to electrically connect at least one of the second plates to the first reference voltage and electrically connect at least one of the second plates to a second reference voltage.