Semiconductor chip design method and computing device for performing the same

A method of designing a semiconductor chip, the method comprising:

• acquiring first data indicating an arrangement for a plurality of cells on the semiconductor chip;
• acquiring second data including routing information and a plurality of pieces of library information, the routing information indicating routing between the plurality of cells and power sources, the plurality of pieces of library information corresponding to the plurality of cells;
• acquiring merged data by merging the routing information of corresponding cells amongst the second data and the first data;
• detecting at least one error among a short error, a float error, and a different type library error based on the merged data;
• and
• outputting a verification result indicating the at least one error.

A computing device comprising:

• at least one processor;
• and
• a memory storing instructions that, when executed by the at least one processor, configure the computing device to,
• acquire first data indicating an arrangement for a plurality of cells on a semiconductor chip;
• acquire second data indicating routing between the plurality of cells and power and signal lines, the power and signal lines including at least one power line and at least one signal line;
• and
• output a verification result by detecting at least one error in the arrangement of the plurality of cells based on the first data and the second data.