Analog multiply-accumulate unit for multibit in-memory cell computing
AssigneeIntel Corporation
InventorsHechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte
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Abstract
Systems, apparatuses and methods include technology that receives, with a first plurality of multipliers of a multiply-accumulator (MAC), first digital signals from a memory array, wherein the first plurality of multipliers includes a plurality of capacitors. The technology further executes, with the first plurality of multipliers, multibit computation operations with the plurality of capacitors based on the first digital signals, and generates, with the first plurality of multipliers, a first analog signal based on the multibit computation operations.
Claims25
A computing system comprising:
- a processor;
- a memory array;
- and
- a multiply-accumulator (MAC), wherein the MAC includes a first plurality of multipliers that includes a plurality of capacitors, wherein the first plurality of multipliers is configured to:
- receive first digital signals from the memory array,
- execute multibit computation operations with the plurality of capacitors based on the first digital signals, and
- generate a first analog signal based on the multibit computation operations.
A semiconductor apparatus comprising:
- one or more substrates;
- and
- logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable or fixed-functionality hardware, the logic and comprising:
- a memory array;
- and
- a multiply-accumulator (MAC) connected to the memory array, wherein the MAC includes a first plurality of multipliers that includes a plurality of capacitors, wherein the first plurality of multipliers is configured to:
- receive first digital signals from the memory array;
- execute multibit computation operations with the plurality of capacitors based on the first digital signals;
- and
- generate a first analog signal based on the multibit computation operations.
A method comprising:
- receiving, with a first plurality of multipliers of a multiply-accumulator (MAC), first digital signals from a memory array, wherein the first plurality of multipliers includes a plurality of capacitors;
- executing, with the first plurality of multipliers, multibit computation operations with the plurality of capacitors based on the first digital signals;
- and
- generating, with the first plurality of multipliers, a first analog signal based on the multibit computation operations.
Dependencies are inferred from the claim text.