Multiplexing Between Different Processing Channels

A non-transitory computer readable storage medium having stored thereon a computer readable dataset description that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture an integrated circuit embodying a circuit for use in a processor, the circuit comprising:

• a first processing channel comprising:
• a respective first input line, second input line and output line, and a first logic unit configured to perform an operation on a respective first input and second input of the first logic unit to produce a respective result at a respective output of the first logic unit, wherein the first input of the first logic unit is coupled to the first input line of the first processing channel;
• a second processing channel comprising:
• a respective first input line, second input line and output line, and a second logic unit configured to perform an operation on a respective first input and second input of the second logic unit to produce a respective result at a respective output of the second logic unit, wherein the first input of the second logic unit is coupled to the first input line of the second processing channel;
• multiplexing circuitry comprising:
• a first input multiplexer arranged to switch between:
• a respective first state in which the second input of the first logic unit is coupled to the second input line of the first processing channel, and a respective second state in which the second input of the first logic unit is instead coupled to the first input line of the second processing channel, and
• a first output multiplexer, arranged to switch between:
• a respective first state in which the output line of the second processing channel is coupled to the output of the second logic unit, and a respective second state in which the output line of the second processing channel is instead coupled to the output of the first logic unit;
• and
• control circuitry arranged to control the multiplexing circuitry in response to instructions being executed.

A method of operating a circuit in a processor, the circuit comprising:

• a first processing channel comprising:
• a respective first input line, second input line and output line, and a first logic unit configured to perform an operation on a respective first input and second input of the first logic unit to produce a respective result at a respective output of the first logic unit, wherein the first input of the first logic unit is coupled to the first input line of the first processing channel;
• and
• a second processing channel comprising:
• a respective first input line, second input line and output line, and a second logic unit configured to perform an operation on a respective first input and second input of the second logic unit to produce a respective result at a respective output of the second logic unit, wherein the first input of the second logic unit is coupled to the first input line of the second processing channel;
• wherein the method comprises controlling multiplexing circuitry in response to execution of instructions by the processor, including:
• operating a first input multiplexer of the multiplexing circuitry to switch between:
• a respective first state in which the second input of the first logic unit is coupled to the second input line of the first processing channel, and a respective second state in which the second input of the first logic unit is instead coupled to the first input line of the second processing channel, and
• operating a first output multiplexer of the multiplexing circuitry to switch between:
• a respective first state in which the output line of the second processing channel is coupled to the output of the second logic unit, and a respective second state in which the output line of the second processing channel is instead coupled to the output of the first logic unit.