# US 2021/0344360 A1 · Memory system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0344360 A1 - Document ID: US20210344360A1 - Status: Published application - Kind: A1 - Application number: 17/376,013 - Filed: 2021-07-14 - Published: 2021-11-04 - Earliest claimed: 2019-05-24 - Assignees: Kioxia Corporation - Applicants: KIOXIA Corporation - Inventors: Yasuyuki IMAIZUMI; Satoshi SHOJI; Mitsunori TADOKORO; Takashi ISHIGURO; Yifan TANG - Web page: https://patentgrep.com/patent/US20210344360A1 ## CPC - H03M 13/1515: {Reed-Solomon codes} - H03M 13/2948: {Iterative decoding (H03M13/2957 takes precedence)} - G06F 11/1012: {using codes or arrangements adapted for a specific type of error (G06F11/1048 takes precedence)} - G06F 11/1032: {Simple parity} - G06F 11/1044: {with specific ECC/EDC distribution} - G06F 11/3037: {where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00)} - H03M 13/1102: {Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes} - H03M 13/1108: {Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping} - H03M 13/1111: {Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms} - H03M 13/154: {Error and erasure correction, e.g. by using the error and erasure locator or Forney polynomial} - H03M 13/2909: {Product codes} - H03M 13/293: {with erasure setting} - H03M 13/373: {with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes} - H03M 13/3746: {with iterative decoding} - H03M 13/09: Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A memory system includes a non-volatile memory and a controller. The controller is configured to perform iterative correction on a plurality of frames of data read from the non-volatile memory. The iterative correction includes performing a first error correction on each of the frames including a first frame having errors not correctable by the first error correction, generating a syndrome on a set of second frames that include the first frame, performing a second error correction on the second frames using the syndrome, and performing a third error correction on the first frame. Each of the frames includes user data and first parity data used in the first error correction, the first parity data of the first frame also being used in the third error correction. ## Claims ### Claim 1 A controller configured to perform iterative correction on a plurality of frames of data read from non-volatile memory, wherein the iterative correction includes performing a first error correction on each of the plurality of frames including a first frame having errors not correctable by the first error correction, generating a syndrome on a set of second frames that include the first frame, performing a second error correction on the second frames using the syndrome, and performing a third error correction on the first frame, each of the plurality of frames includes first parity data used in the first error correction, the first parity data of the first frame also being used in the third error correction, each of the second frames includes at least a first symbol and a second symbol, the syndrome includes first and second syndromes, the second error correction being performed on the first symbols of the second frames using the first syndrome and on the second symbols of the second frames using the second syndrome, the first syndrome contains information for correcting an error in a first one of the first symbols and information for correcting an error in a second one of the first symbols, the second syndrome contains information for correcting an error in a first one of the second symbols and information for correcting an error in a second one of the second symbols, the first one of the first symbols and the first one of the second symbols are parts of a third frame, the third frame being one of the second frames, and the second one of the first symbols and the second one of the second symbols are parts of a fourth frame, the fourth frame being one of the second frames that is not the third frame. ### Claim 2 (depends on 1) The controller according to claim 1, wherein at least one of the second frames includes second parity data that is used in the second error correction. ### Claim 3 (depends on 1) The controller according to claim 1, wherein the iterative correction further includes: after performing the third error correction on the first frame, generating another syndrome on the second frames, and performing a fourth error correction on the second frames using said another syndrome. ### Claim 4 (depends on 3) The controller according to claim 3, wherein said another syndrome includes a third syndrome used in the fourth error correction performed on the first symbols of the second frames and a fourth syndrome used in the fourth error correction performed on the second symbols of the second frames. ### Claim 5 (depends on 4) The controller according to claim 4, wherein the third syndrome contains information for correcting an error in a third one of the first symbols and information for correcting an error in a fourth one of the first symbols, and the fourth syndrome contains information for correcting an error in a third one of the second symbols and information for correcting an error in a fourth one of the second symbols. ### Claim 6 (depends on 5) The controller according to claim 5, wherein the third one of the first symbols and the third one of the second symbols are parts of a fifth frame, the fifth frame being one of the second frames, and the fourth one of the first symbols and the fourth one of the second symbols are parts of a sixth frame, the sixth frame being one of the second frames that is not the fifth frame. ### Claim 7 (depends on 1) The controller according to claim 1, wherein the third and fourth frames have errors not correctable by performing an error correction using the first parity data. ### Claim 8 (depends on 7) The controller according to claim 7, wherein the third and fourth frames are the only two frames of the second frames having errors not correctable by performing an error correction using the first parity data. ### Claim 9 (depends on 1) The controller according to claim 1, wherein the controller is further configured to update at least a portion of the syndrome by using symbols that are included in the first frame, so as to generate an updated syndrome. ### Claim 10 (depends on 1) The controller according to claim 1, wherein the third error correction uses a soft decision decoding. ### Claim 11 (depends on 1) The controller according to claim 1, wherein the third error correction uses a hard decision decoding. ### Claim 12 (depends on 1) The controller according to claim 1, wherein the first error correction uses a hard decision decoding, and the third error correction uses a soft decision decoding. ### Claim 13 A controller configured to perform iterative correction on a plurality of frames of data read from non-volatile memory, wherein the iterative correction includes performing a first error correction on each of the plurality of frames including a first frame having errors not correctable by the first error correction, generating a syndrome on a set of second frames that include the first frame, performing a second error correction on the second frames using the syndrome, and performing a third error correction on the first frame, each of the plurality of frames includes first parity data used in the first error correction, the first parity data of the first frame also being used in the third error correction, the first error correction uses a hard decision decoding, and the third error correction uses a soft decision decoding. ### Claim 14 (depends on 13) The controller according to claim 13, wherein at least one of the second frames includes second parity data that is used in the second error correction. ### Claim 15 (depends on 13) The controller according to claim 13, wherein the iterative correction further includes: after performing the third error correction on the first frame, generating another syndrome on the second frames, and performing a fourth error correction on the second frames using said another syndrome. ### Claim 16 (depends on 13) The controller according to claim 13, wherein the controller is further configured to update at least a portion of the syndrome by using symbols that are included in the first frame, so as to generate an updated syndrome.