# US 2021/0344310 A1 · Common-mode insensitive current-sensing topology in full-bridge driver

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- Number: US 2021/0344310 A1
- Document ID: US20210344310A1
- Status: Published application
- Kind: A1
- Application number: 17/003,564
- Filed: 2020-08-26
- Published: 2021-11-04
- Earliest claimed: 2020-05-01
- Assignees: Cirrus Logic International Semiconductor Ltd.
- Applicants: Cirrus Logic International Semiconductor Ltd.
- Inventors: Ramin ZANBAGHI; Cory J. PETERSON; Anand ILANGO; Eric KIMBALL
- Web page: https://patentgrep.com/patent/US20210344310A1

## CPC

- H03F 3/2173: {of the bridge type}
- G01R 1/203: {Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts (resistors in general H01C; microwave or radiowave terminations H01P1/26; coupling devices H01R)}
- G01R 19/0092: {Measuring current only}
- G01R 19/16538: {in AC or DC supplies (G01R19/16519 and G01R19/16528 take precedence)}
- G01R 19/175: Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
- G05F 1/461: {using an operational amplifier as final control device}
- H03F 1/38: Positive-feedback circuit arrangements without negative feedback
- H03F 3/187: in integrated circuits
- H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062)
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H03F 3/45928: {using IC blocks as the active amplifying circuit}
- H04R 1/1016: {Earpieces of the intra-aural type}
- G01R 35/005: {Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references (G01R33/0035, G01R35/002 take precedence)}
- H03F 2200/03: the amplifier being designed for audio applications
- H03F: AMPLIFIERS
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)

## Abstract

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

## Claims

### Claim 1

A system comprising:
a Class-D stage comprising:
a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage;
a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage;
a first low-side switch coupled between a ground voltage and the first output terminal; and
a second low-side switch coupled between the ground voltage and the second output terminal; and
current sensing circuitry comprising:
a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated;
a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated; and
measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

### Claim 2 (depends on 1)

The system of claim 1, wherein the measurement circuitry comprises an amplifier configured to amplify a difference between the first sense voltage and the second sense voltage to generate a combined sense voltage.

### Claim 3 (depends on 1)

The system of claim 1, wherein the Class-D stage further comprises:
a third sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through the load causes a third sense voltage proportional to the output current across the third sense resistor when the first low-side switch is activated; and
a fourth sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a fourth sense voltage proportional to the output current across the fourth sense resistor when the second low-side switch is activated;
wherein the measurement circuitry is configured to measure the third sense voltage and the fourth sense voltage to determine the output current.

### Claim 4 (depends on 3)

The system of claim 3, wherein the measurement circuitry further comprises:
a first amplifier configured to amplify a difference between the first sense voltage and the second sense voltage to generate a high-side sense voltage; and
a second amplifier configured to amplify a difference between the third sense voltage and the fourth sense voltage to generate a low-side sense voltage.

### Claim 5 (depends on 4)

The system of claim 4, wherein the measurement circuitry further comprises a combiner configured to combine the high-side sense voltage and the low-side sense voltage to generate a combined sense voltage indicative of the output current.

### Claim 6 (depends on 1)

The system of claim 1, further comprising a calibration subsystem comprising a first calibration resistor and a second calibration resistor and configured to calibrate for mismatch between common mode phases of the Class-D stage.

### Claim 7 (depends on 6)

The system of claim 6, wherein the first calibration resistor is coupled between the first sense resistor and an amplifier and the second calibration resistor is coupled between the second sense resistor and the amplifier.

### Claim 8 (depends on 6)

The system of claim 6, wherein the first calibration resistor and the second calibration resistor comprise feedback resistors of an amplifier.

### Claim 9 (depends on 6)

The system of claim 6, wherein the calibration subsystem is further configured to:
calibrate a first variable resistance of the first calibration resistor when the second sense resistor is in a fully-differential current path of the output current; and
calibrate a second variable resistance of the second calibration resistor when the first sense resistor is in the fully-differential current path of the output current.

### Claim 10 (depends on 6)

The system of claim 6, wherein the calibration subsystem is further configured to:
calibrate a first variable resistance of the first calibration resistor when a polarity of the output current is a first polarity; and
calibrate a second variable resistance of the first calibration resistor when the polarity of the output current is a second polarity.

### Claim 11 (depends on 10)

The system of claim 10, wherein the calibration subsystem is further configured to alternate between calibration of the first variable resistance and the second variable resistance, and vice versa, at zero crossings of the output current.

### Claim 12

A method, in a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal, comprising:
measuring a first sense voltage with a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes the first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated;
measuring a second sense voltage with a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes the second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated; and
determining the output current based on both of the first sense voltage and the second sense voltage.

### Claim 13 (depends on 12)

The method of claim 12, further comprising amplifying a difference between the first sense voltage and the second sense voltage to generate a combined sense voltage.

### Claim 14 (depends on 11)

The method of claim 11, further comprising:
measuring a third sense voltage with a third sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through the load causes the third sense voltage proportional to the output current across the third sense resistor when the first low-side switch is activated;
measuring a fourth sense voltage with a fourth sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes the fourth sense voltage proportional to the output current across the third sense resistor when the second low-side switch is activated; and
determining the output current based on the first sense voltage, the second sense voltage, the third sense voltage, and the fourth sense voltage.

### Claim 15 (depends on 14)

The method of claim 14, further comprising:
amplifying a difference between the first sense voltage and the second sense voltage to generate a high-side sense voltage; and
amplifying a difference between the third sense voltage and the fourth sense voltage to generate a low-side sense voltage.

### Claim 16 (depends on 15)

The method of claim 15, further comprising combining the high-side sense voltage and the low-side sense voltage to generate a combined sense voltage indicative of the output current.

### Claim 17 (depends on 12)

The method of claim 12, further comprising calibrating for mismatch between common mode phases of the Class-D with a calibration subsystem comprising a first calibration resistor and a second calibration resistor and configured to calibrate for mismatch between common mode phases of the Class-D stage.

### Claim 18 (depends on 17)

The method of claim 17, wherein the first calibration resistor is coupled between the first sense resistor and an amplifier and the second calibration resistor is coupled between the second sense resistor and the amplifier.

### Claim 19 (depends on 17)

The method of claim 17, wherein the first calibration resistor and the second calibration resistor comprise feedback resistors of an amplifier.

### Claim 20 (depends on 17)

The method of claim 17, further comprising:
calibrating a first variable resistance of the first calibration resistor when the second sense resistor is in a fully-differential current path of the output current; and
calibrating a second variable resistance of the second calibration resistor when the first sense resistor is in the fully-differential current path of the output current.

### Claim 21 (depends on 17)

The method of claim 17, further comprising:
calibrating a first variable resistance of the first calibration resistor when a polarity of the output current is a first polarity; and
calibrating a second variable resistance of the first calibration resistor when the polarity of the output current is a second polarity.

### Claim 22 (depends on 21)

The method of claim 21, further comprising alternating between calibration of the first variable resistance and the second variable resistance, and vice versa, at zero crossings of the output current.
