# US 2021/0344309 A1 · Common-mode insensitive current-sensing topology in full-bridge driver with high-side and low-side energy matching calibration

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2021/0344309 A1
- Document ID: US20210344309A1
- Status: Published application
- Kind: A1
- Application number: 16/864,893
- Filed: 2020-05-01
- Published: 2021-11-04
- Earliest claimed: 2020-05-01
- Assignees: Cirrus Logic International Semiconductor Ltd.
- Applicants: Cirrus Logic International Semiconductor Ltd.
- Inventors: Ramin ZANBAGHI; Cory J. PETERSON; Anand ILANGO; Eric KIMBALL
- Web page: https://patentgrep.com/patent/US20210344309A1

## CPC

- H03F 3/2173: {of the bridge type}
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H03F 3/187: in integrated circuits
- H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062)
- H03F 2200/03: the amplifier being designed for audio applications
- H03F 2200/462: the current being sensed
- H03F 2200/471: the voltage being sensed
- H04R 1/10: Earpieces; Attachments therefor {; Earphones; Monophonic headphones (H04R1/28 takes precedence; stereophonic headphones H04R5/033)}
- H04R 5/033: Headphones for stereophonic communication {(details thereof, e.g. relating to batteries, cables or control elements H04R1/10)}
- H04R 17/00: Piezoelectric transducers; Electrostrictive transducers (piezoelectric or electrostrictive elements in general H10N30/00; details of piezoelectric or electrostrictive motors, generators or positioners {H10N30/00})
- H04R 29/001: {for loudspeakers (H04R29/007 takes precedence)}
- H03F: AMPLIFIERS
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)

## Abstract

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

## Claims

### Claim 1

A system comprising:
a Class-D stage comprising:
a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage;
a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage;
a first low-side switch coupled between a ground voltage and the first output terminal; and
a second low-side switch coupled between the ground voltage and the second output terminal; and
current sensing circuitry comprising:
a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated;
a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated; and
measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current; and
a calibration subsystem comprising a first calibration resistor and a second calibration resistor and configured to calibrate for mismatch between common mode phases of the Class-D stage.

### Claim 2 (depends on 1)

The system of claim 1, wherein the measurement circuitry comprises an amplifier configured to amplify a difference between the first sense voltage and the second sense voltage to generate a combined sense voltage.

### Claim 3

(canceled)

### Claim 4 (depends on 1)

The system of claim 1, wherein the first calibration resistor is coupled between the first sense resistor and the amplifier and the second calibration resistor is coupled between the second sense resistor and the amplifier.

### Claim 5 (depends on 1)

The system of claim 1, wherein the first calibration resistor and the second calibration resistor comprise feedback resistors of the amplifier.

### Claim 6 (depends on 1)

The system of claim 1, wherein the calibration subsystem is further configured to:
calibrate a first variable resistance of the first calibration resistor when the second sense resistor is in a fully-differential current path of the output current; and
calibrate a second variable resistance of the second calibration resistor when the first sense resistor is in the fully-differential current path of the output current.

### Claim 7 (depends on 1)

The system of claim 1, wherein the calibration subsystem is further configured to:
calibrate a first variable resistance of the first calibration resistor when a polarity of the output current is a first polarity; and
calibrate a second variable resistance of the first calibration resistor when the polarity of the output current is a second polarity.

### Claim 8 (depends on 7)

The system of claim 7, wherein the calibration subsystem is further configured to alternate between calibration of the first variable resistance and the second variable resistance, and vice versa, at zero crossings of the output current.

### Claim 9

A method, in a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal, comprising:
measuring a first sense voltage with a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes the first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated;
measuring a second sense voltage with a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes the second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated;
determining the output current based on one or both of the first sense voltage and the second sense voltage; and
calibrating for mismatch between common mode phases of the Class-D stage with a calibration subsystem comprising a first calibration resistor and a second calibration resistor and configured to calibrate for mismatch between common mode phases of the Class-D stage.

### Claim 10 (depends on 9)

The method of claim 9, further comprising amplifying a difference between the first sense voltage and the second sense voltage to generate a combined sense voltage.

### Claim 11

(canceled)

### Claim 12 (depends on 9)

The method of claim 9, wherein the first calibration resistor is coupled between the first sense resistor and the amplifier and the second calibration resistor is coupled between the second sense resistor and the amplifier.

### Claim 13 (depends on 9)

The method of claim 9, wherein the first calibration resistor and the second calibration resistor comprise feedback resistors of the amplifier.

### Claim 14 (depends on 9)

The method of claim 9, further comprising:
calibrating a first variable resistance of the first calibration resistor when the second sense resistor is in a fully-differential current path of the output current; and
calibrating a second variable resistance of the second calibration resistor when the first sense resistor is in the fully-differential current path of the output current.

### Claim 15 (depends on 9)

The method of claim 9, further comprising:
calibrating a first variable resistance of the first calibration resistor when a polarity of the output current is a first polarity; and
calibrating a second variable resistance of the first calibration resistor when the polarity of the output current is a second polarity.

### Claim 16 (depends on 15)

The method of claim 15, further comprising alternating between calibration of the first variable resistance and the second variable resistance, and vice versa, at zero crossings of the output current.
