# US 2021/0344307 A1 · Load detection circuit and amplifier circuit

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- Number: US 2021/0344307 A1
- Document ID: US20210344307A1
- Status: Published application
- Kind: A1
- Application number: 17/242,474
- Filed: 2021-04-28
- Published: 2021-11-04
- Earliest claimed: 2020-04-30
- Assignees: Murata Manufacturing Co., Ltd.
- Applicants: Murata Manufacturing Co., Ltd.
- Inventors: Ikumi TOKUDA
- Web page: https://patentgrep.com/patent/US20210344307A1

## CPC

- H03F 1/565: {using inductive elements}
- H03F 3/195: in integrated circuits
- H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)}
- H03F 2200/105: A non-specified detector of the power of a signal being used in an amplifying circuit
- H03F 2200/318: A matching circuit being used as coupling element between two amplifying stages
- H03F 2200/423: Amplifier output adaptation especially for transmission line coupling purposes, e.g. impedance adaptation
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H03F: AMPLIFIERS

## Abstract

A load detection circuit includes a first detection part and a second detection part. The first detection part includes a first capacitor and a second capacitor, forms capacitive coupling with a signal transmission line connecting an output port of an RF amplifier and a load, and outputs a first signal. The second detection part includes a first inductor and a second inductor, forms inductive coupling with the signal transmission line, and outputs a second signal.

## Claims

### Claim 1

A load detection circuit comprising:
a first detection circuit that is capacitively coupled with a signal transmission line, and that is configured to output a first signal, the signal transmission line connecting an output port of a RF amplifier and a load; and
a second detection circuit that is inductively coupled with the signal transmission line, and that is configured to output a second signal.

### Claim 2 (depends on 1)

The load detection circuit according to claim 1, further comprising:
an arithmetic circuit configured to generate a load impedance detection signal by performing a subtraction operation on the first signal and the second signal.

### Claim 3 (depends on 2)

The load detection circuit according to claim 2, wherein the arithmetic circuit is further configured to generate a power detection signal by adding the first signal to the second signal together.

### Claim 4 (depends on 2)

The load detection circuit according to claim 2, wherein the arithmetic circuit comprises logarithmic converters configured to logarithmically convert the first signal and the second signal.

### Claim 5 (depends on 2)

The load detection circuit according to claim 2, further comprising:
detector circuits configured to detect the first signal and the second signal before the first signal and the second signal are input to the arithmetic circuit.

### Claim 6

A load detection circuit comprising:
a first detection circuit that is capacitively coupled with a signal transmission line, the signal transmission line connecting an output port of a RF amplifier and a load; and
a second detection circuit that is inductively coupled with the signal transmission line, wherein:
the first detection circuit and the second detection circuit are connected to each other,
a first signal is output from the second detection circuit from a side of the second detection circuit that is closer to the load than to the output port of the RF amplifier, and
a second signal is output from the second detection circuit from a side of the second detection circuit that is closer to the output port of the RF amplifier than to the load.

### Claim 7 (depends on 2)

An amplifier circuit comprising:
the load detection circuit according to claim 2;
the RF amplifier;
an output matching circuit; and
a control circuit to which the load impedance detection signal is input,
wherein the control circuit is configured to control an impedance of the output matching circuit using the load impedance detection signal.

### Claim 8 (depends on 7)

The amplifier circuit according to claim 7, further comprising:
an input matching circuit connected to an input port of the RF amplifier,
wherein the control circuit is configured to control an impedance of the input matching circuit using the load impedance detection signal.

### Claim 9 (depends on 8)

The amplifier circuit according to claim 8, further comprising:
a RF sub-amplifier connected in parallel to the RF amplifier, wherein:
the input matching circuit is further connected to an input port of the RF sub-amplifier, and
the control circuit is further configured to control the impedance of the input matching circuit using the load impedance detection signal.

### Claim 10 (depends on 2)

An amplifier circuit comprising:
the load detection circuit according to claim 2;
the RF amplifier;
an output matching circuit; and
a control circuit to which the load impedance detection signal is input,
wherein the control circuit is configured to control a drive condition of the RF amplifier using the load impedance detection signal.

### Claim 11 (depends on 10)

The amplifier circuit according to claim 10, wherein the control circuit is configured to control, as the drive condition, a bias voltage of the RF amplifier.

### Claim 12 (depends on 10)

The amplifier circuit according to claim 10, wherein the control circuit is configured to control, as the drive condition, a drive voltage of the RF amplifier.

### Claim 13 (depends on 10)

The amplifier circuit according to claim 10, further comprising:
a RF sub-amplifier connected in parallel to the RF amplifier,
wherein the control circuit is further configured to control a drive condition of the RF sub-amplifier using the load impedance detection signal.

### Claim 14 (depends on 2)

An amplifier circuit comprising:
the load detection circuit according to claim 2;
the RF amplifier;
a RF sub-amplifier connected in parallel to the RF amplifier;
an output matching circuit; and
a control circuit to which the load impedance detection signal is input,
wherein the control circuit is configured to control a drive condition of the RF sub-amplifier using the load impedance detection signal.

### Claim 15 (depends on 7)

The amplifier circuit according to claim 7, wherein the load detection circuit is connected between the RF amplifier and the output matching circuit.

### Claim 16 (depends on 7)

The amplifier circuit according to claim 7, wherein the load detection circuit is connected between the output matching circuit and the load.

### Claim 17 (depends on 10)

The amplifier circuit according to claim 10, wherein the load detection circuit is connected between the RF amplifier and the output matching circuit.

### Claim 18 (depends on 10)

The amplifier circuit according to claim 10, wherein the load detection circuit is connected between the output matching circuit and the load.
