# US 2021/0343818 A1 · Method for manufacturing active matrix substrate, and active matrix substrate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0343818 A1 - Document ID: US20210343818A1 - Status: Published application - Kind: A1 - Application number: 17/273,287 - Filed: 2018-09-06 - Published: 2021-11-04 - Earliest claimed: 2018-09-06 - Assignees: Sharp Kabushiki Kaisha - Applicants: Sharp Kabushiki Kaisha - Inventors: TAKAO SAITOH; MASAHIKO MIWA; YOHSUKE KANZAKI; YI SUN; MASAKI YAMANAKA; SEIJI KANEKO - Web page: https://patentgrep.com/patent/US20210343818A1 ## CPC - H10D 86/411: {characterised by materials, geometry or structure of the substrates} - G09F 9/00: Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements (in which the variable information is permanently attached to a movable support G09F11/00; abacus G06C1/00; slide-rules G06G1/00) - G09F 9/30: in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00) - H10D 86/0212: {comprising manufacture, treatment or coating of substrates} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1213: {the pixel elements being TFTs} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10K 59/1201: {Manufacture or treatment} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G09F: DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract In a method for manufacturing an active matrix substrate, forming of an underlayer inorganic insulating film includes applying a resist onto the underlayer inorganic insulating film, performing an ashing process of forming a surface having irregularities on a surface of the resist by a first ashing process, and, after the ashing process has been performed, roughening a surface of the underlayer inorganic insulating film by performing a second ashing process and an etching process on the underlayer inorganic insulating film. When forming a semiconductor film, a surface of at least a part of the semiconductor film is roughened following a rough surface of the underlayer inorganic insulating film. ## Claims ### Claim 1 A method for manufacturing an active matrix substrate comprising: forming an underlayer inorganic insulating film on a substrate; forming a semiconductor film on the underlayer inorganic insulating film; patterning the semiconductor film; forming a gate insulating film on the semiconductor film; forming a gate metal film on the gate insulating film; and patterning a gate electrode from the gate metal film, wherein the forming of the underlayer inorganic insulating film includes applying a resist onto the underlayer inorganic insulating film, performing an ashing process of forming a surface having irregularities on a surface of the resist by a first ashing process, and, after the ashing process has been performed, roughening a surface of the underlayer inorganic insulating film by performing a second ashing process and an etching process on the underlayer inorganic insulating film, and in the forming of the semiconductor film, a surface of at least a part of the semiconductor film is roughened following a rough surface of the underlayer inorganic insulating film. ### Claim 2 (depends on 1) The method for manufacturing an active matrix substrate according to claim 1, wherein the underlayer inorganic insulating film has a flattened area, the method further comprising patterning a roughened area in an area of the flattened area that entirely overlaps the semiconductor film forming transistors. ### Claim 3 (depends on 2) The method for manufacturing an active matrix substrate according to claim 2, further comprising: patterning the roughened area that overlaps the semiconductor film that overlaps at least the gate electrode; and patterning and forming a doped area of the semiconductor film such that the flattened area and at least a part of the doped area of the semiconductor film overlap each other. ### Claim 4 (depends on 2) The method for manufacturing an active matrix substrate according to claim 2, the method further comprising: providing a pixel circuit including a drive transistor in which the gate electrode and the roughened area overlap each other, and having the semiconductor film of which at least a part overlaps the roughened area, and a write transistor in which the flattened area and the gate electrode overlap each other via the semiconductor film. ### Claim 5 (depends on 2) The method for manufacturing an active matrix substrate according to claim 2, further comprising: providing the semiconductor film, which is a continuous semiconductor film forming a write transistor and a light emission control transistor and at least a part of which overlaps the flattened area between the light emission control transistor and the write transistor. ### Claim 6 (depends on 5) The method for manufacturing an active matrix substrate according to claim 5, further comprising: providing the light emission control transistor having the semiconductor film in which the gate electrode and the flattened area overlap each other. ### Claim 7 (depends on 2) The method for manufacturing an active matrix substrate according to claim 2, further comprising: providing an initialization transistor for a drive transistor having the semiconductor film in which the gate electrode and the roughened area overlap each other. ### Claim 8 (depends on 7) The method for manufacturing an active matrix substrate according to claim 7, further comprising: providing an initialization transistor for a drive transistor having the semiconductor film that entirely overlaps the roughened area. ### Claim 9 (depends on 2) The method for manufacturing an active matrix substrate according to claim 2, further comprising: providing a threshold voltage compensation transistor having the semiconductor film in which the gate electrode and the roughened area overlap each other. ### Claim 10 (depends on 9) The method for manufacturing an active matrix substrate according to claim 9, further comprising: providing a threshold voltage compensation transistor having the semiconductor film that entirely overlaps the roughened area. ### Claim 11 An active matrix substrate in which an underlayer inorganic insulating film, a semiconductor film, a gate insulating film, and a gate electrode are formed in that order on a substrate, wherein the underlayer inorganic insulating film has a roughened area and a flattened area, the roughened area is formed to be a rough surface that is rougher than the flattened area, and a surface of the semiconductor film overlapping the roughened area is roughened following the rough surface of the underlayer inorganic insulating film. ### Claim 12 (depends on 11) The active matrix substrate according to claim 11, wherein the roughened area is formed to entirely overlap the semiconductor film forming transistors. ### Claim 13 (depends on 12) The active matrix substrate according to claim 12, wherein an interlayer film and a source electrode are included in order from a face of the gate electrode that is on an opposite side to the substrate, the roughened area is formed to overlap the semiconductor film that overlaps at least the gate electrode, the semiconductor film is electrically connected to the source electrode via a contact hole formed in the gate insulating film and the interlayer film, and at least the contact hole and the flattened area overlap each other. ### Claim 14 (depends on 12) The active matrix substrate according to claim 12, further comprising: a pixel circuit including a drive transistor and a write transistor, wherein the gate electrode and the roughened area overlap each other in the semiconductor film forming the drive transistor in the pixel circuit, and the gate electrode and the flattened area overlap each other in the semiconductor film forming the write transistor. ### Claim 15 (depends on 12) The active matrix substrate according to claim 12, wherein a write transistor and a light emission control transistor are formed of the semiconductor film, which is continuous, and at least a part of the semiconductor film between the light emission control transistor and the write transistor overlaps the flattened area. ### Claim 16 (depends on 15) The active matrix substrate according to claim 15, wherein the gate electrode and the flattened area overlap each other in the semiconductor film forming the light emission control transistor. ### Claim 17 (depends on 12) The active matrix substrate according to claim 12, wherein the gate electrode and the roughened area overlap each other in the semiconductor film forming an initialization transistor for a drive transistor. ### Claim 18 (depends on 17) The active matrix substrate according to claim 17, wherein the semiconductor film entirely overlaps the roughened area in the semiconductor film forming the initialization transistor for a drive transistor. ### Claim 19 (depends on 12) The active matrix substrate according to claim 12, wherein the gate electrode and the roughened area overlap each other in the semiconductor film forming the threshold voltage compensation transistor. ### Claim 20 (depends on 19) The active matrix substrate according to claim 19, wherein the semiconductor film entirely overlaps the roughened area in the semiconductor film forming the threshold voltage compensation transistor.