Methods of manufacturing a transistor device

A method of forming a lateral transistor device, the method comprising:

• providing a non-electrically conductive layer on a semiconductor substrate;
• using a first mask in a first mask and etch process to provide two windows in the non-electrically conductive layer through which the semiconductor substrate is exposed;
• the two windows separated by a divider region of the non-electrically conductive layer;
• depositing a conformal polysilicon layer over the non-electrically conductive layer and windows such that the polysilicon layer contacts the substrate through the windows;
• using a second mask in a second mask and etch process to selectively remove the portion of polysilicon layer lying over the divider region to leave two isolated regions of polysilicon, each isolated region of polysilicon in contact with the substrate to provides respective emitter and collector regions of the lateral transistor;
• and
• wherein a divider region feature size of the second mask used to selective remove the polysilicon layer lying over the divider region is substantially the same or larger than a divider region feature size of the first mask used to define the divider region.

A method of manufacturing a transistor device comprising an integrated circuit comprises a lateral transistor and vertical transistor, the method comprising:

• providing a wafer comprising a semiconductor substrate of a first type having a semiconductor layer of a second type thereon;
• with a first mask, implanting and diffusing dopant of the first type to form a first and second regions of the first type in the semiconductor layer to provide respectively:
• an emitter region of the vertical transistor and a base region of a lateral transistor;
• with a second mask, implanting and diffusing further dopant of the first type into the first and second regions of the first type to convert at least a part of the first region of the first type to a first relatively highly doped region of the first type, and part of the second region of the first type to a second relatively highly doped region of the first type to provide a base contact region of the lateral transistor;
• implanting dopant of the second type across the wafer to convert an exposed surface region of the second region of the first type to a relatively low doped region of the first type;
• using a third mask, etching the surface of the wafer to form a trench that extends through the semiconductor layer of the second type to divide the semiconductor layer of the second type into multiple electrically isolated regions;
• a first of the regions of the semiconductor layer providing a base region of the vertical transistor, and a second of the regions of the semiconductor layer providing a substrate layer for the lateral transistor;
• depositing an oxide layer over the wafer such that the oxide fills the trench;
• with a fourth mask, etching the oxide layer to form separated windows therein;
• one of the windows exposing a portion of the first region of the semiconductor layer and two other windows exposing regions of the relatively low doped region of the first type;
• with a fifth mask, depositing polysilicon over the wafer and doping the deposited polysilicon with dopant of the second type;
• etching the deposited polysilicon to form a base contact for vertical transistor and collector and emitter regions of the lateral transistor;

A method of forming a lateral bipolar transistor device, the method comprising:

• implanting a dopant of a first type into a semiconductor of a second type to form a relatively highly doped region of the first type within the semiconductor;
• counterdoping a portion of the region of the first type with dopant of the second type to form a relatively lightly doped region of the first type within the relatively highly doped region of the first type, the relatively lightly doped region of the first type having a net concentration of dopant of the first type that is lower compared with the relatively highly doped region of the first type;
• the relatively highly doped region of the first type and relatively lightly doped region of the first type providing a base region of the transistor;
• depositing a layer of silicon oxide onto the surface semiconductor at locations adjacent the relatively lightly doped region and implanting dopant of the second type into the silicon oxide layer to form regions of the second type immediately adjacent to, in direct contact with and physically isolated from one another by the relatively lightly doped region;
• the regions of the second type providing emitter and collector regions of the transistor.