# US 2021/0343352 A1 · Nonvolatile memory device, storage device including nonvolatile memory device, and operating method of nonvolatile memory device

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- Number: US 2021/0343352 A1
- Document ID: US20210343352A1
- Status: Published application
- Kind: A1
- Application number: 17/134,968
- Filed: 2020-12-28
- Published: 2021-11-04
- Earliest claimed: 2020-05-04
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Yongsung CHO; Bong-Kil JUNG; Hangil JEONG
- Web page: https://patentgrep.com/patent/US20210343352A1

## CPC

- G11C 16/3459: {Circuits or methods to verify correct programming of nonvolatile memory cells}
- G11C 11/5628: {Programming or writing circuits; Data input circuits}
- G11C 16/08: Address circuits; Decoders; Word-line control circuits
- G11C 16/10: Programming or data input circuits
- G11C 16/24: Bit-line control circuits
- G11C 16/26: Sensing or reading circuits; Data output circuits
- G11C 16/30: Power supply circuits
- G11C 16/32: Timing circuits
- G11C 16/0483: {comprising cells having several storage transistors connected in series}
- G11C 2211/5642: Multilevel memory with buffers, latches, registers at input or output
- G11C 2211/5644: Multilevel memory comprising counting devices
- G11C 2216/20: Suspension of programming or erasing cells in an array in order to read other cells in it
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

An operating method of a nonvolatile memory device includes receiving, at the nonvolatile memory device, a suspend command, suspending, at the nonvolatile memory device, a program operation being performed, in response to the suspend command, receiving, at the nonvolatile memory device, a resume command, and resuming, at the nonvolatile memory device, the suspended program operation in response to the resume command. The program operation includes program loops, each of which includes a bit line setup interval, a program interval, and a verify interval. In the program interval of each of the program loops, a level of a program voltage to be applied to selected memory cells of the nonvolatile memory device increases as much as a first voltage. A difference between a level of the program voltage finally applied s suspend and a level of the program voltage applied first after resume is different from the first voltage.

## Claims

### Claim 1

An operating method of a nonvolatile memory device comprising:
receiving, at the nonvolatile memory device, a suspend command;
suspending, at the nonvolatile memory device, a program operation being performed, in response to the suspend command;
receiving, at the nonvolatile memory device, a resume command; and
resuming, at the nonvolatile memory device, the suspended program operation in response to the resume command,
wherein the program operation includes program loops, each of which includes a bit line setup interval, a program interval, and a verify interval,
wherein, in the program interval of each of the program loops, a level of a program voltage to be applied to selected memory cells of the nonvolatile memory device increases as much as a first voltage, and
wherein a difference between a level of the program voltage finally applied to the selected memory cells before the program operation is suspended and a level of the program voltage applied first to the selected memory cells after the suspended program operation is resumed corresponds to a second voltage different from the first voltage.

### Claim 2 (depends on 1)

The operating method of claim 1, wherein the second voltage is smaller than the first voltage.

### Claim 3 (depends on 1)

The operating method of claim 1, further comprising:
counting a time from when the program operation is suspended to when the suspended program operation is resumed,
wherein the second voltage is adjusted based on the counted time.

### Claim 4 (depends on 3)

The operating method of claim 3, wherein, as the counted time increases, the second voltage decreases.

### Claim 5 (depends on 1)

The operating method of claim 1, wherein a difference between a level of the program voltage applied second to the selected memory cells after the suspended program operation is resumed and the first applied level of the program voltage corresponds to the first voltage.

### Claim 6 (depends on 1)

The operating method of claim 1, wherein a difference between a level of the program voltage applied second to the selected memory cells after the suspended program operation is resumed and the first applied level of the program voltage corresponds to a third voltage, and
wherein the third voltage is greater than the second voltage and is smaller than the first voltage.

### Claim 7 (depends on 1)

The operating method of claim 1, further comprising:
counting a time from when the program operation is suspended to when the suspended program operation is resumed; and
verifying, at the nonvolatile memory device, threshold voltages of the selected memory cells in response to the resume command,
wherein the second voltage is adjusted based on the counted time and a result of the verification.

### Claim 8 (depends on 7)

The operating method of claim 7, wherein the verification is not included in the program loops.

### Claim 9 (depends on 1)

The operating method of claim 1, wherein the second voltage is determined based on machine learning.

### Claim 10 (depends on 9)

The operating method of claim 9, wherein the second voltage is determined by the machine learning based on at least one of a time from when the program operation is suspended to when the suspended program operation is resumed, a result of verifying the selected memory cells after the suspended program operation is resumed, a number of program/erase cycles associated with the selected memory cells, a temperature, an interval of a program loop when the program operation is suspended, a number of program loops performed until a time when the program operation is suspended, a number of states program-completed until the time when the program operation is suspended, physical locations of the selected memory cells, and an address of the selected memory cells.

### Claim 11

A nonvolatile memory device comprising:
a memory cell region including memory cells and first metal pads; and
a peripheral region comprising:
second metal pads;
a row decoder connected with the memory cells through word lines, and configured to apply a program voltage to a word line selected from the word lines in a program interval of each of program loops of a program operation and to apply verification voltages to the selected word line in a verify interval of each of the program loops;
a page buffer connected with the memory cells through bit lines, and configured to apply voltages to the bit lines in a bit line setup interval of each of the program loops of the program operation; and
control logic configured to control the row decoder and the page buffer in response to a program command such that the program operation is initiated,
wherein, in the program interval of each of the program loops, the row decoder increases a level of the program voltage applied to the selected word line as much as a first voltage,
wherein the control logic controls the row decoder and the page buffer to suspend the program operation in response to a suspend command and to resume the suspended program operation in response to a resume command,
wherein a difference between a level of the program voltage finally applied to the selected word line before the program operation is suspended and a level of the program voltage applied first to the selected word line after the suspended program operation is resumed corresponds to a second voltage different from the first voltage,
wherein the peripheral region is vertically connected to the memory cell region by the first metal pads and the second metal pads.

### Claim 12 (depends on 11)

The nonvolatile memory device of claim 11, wherein the control logic is further configured to:
count a time from when the program operation is suspended to when the suspended program operations resumed; and
adjust the second voltage based on the counted time.

### Claim 13 (depends on 12)

The nonvolatile memory device of claim 12, wherein the control logic is further configured to:
control the row decoder and the page buffer to verify selected memory cells connected with the selected word line after the suspended program operation is resumed; and
adjust the second voltage further based on a result of the verification.

### Claim 14 (depends on 11)

The nonvolatile memory device of claim 11, wherein the control logic is further configured to:
while the program operation is suspended, perform, in response to another command, an operation specified by the another command.

### Claim 15 (depends on 11)

The nonvolatile memory device of claim 11, wherein the suspend command includes a read command, and
wherein the control logic is further configured to:
control the row decoder and the page buffer, in response to the read command, to perform a read operation after the program operation is suspended.

### Claim 16 (depends on 11)

The nonvolatile memory device of claim 11, wherein, in the program interval of each of the program loops, the row decoder further applies a second program voltage to the selected word line, and
wherein, in the program interval of each of the program loops, the row decoder increases a level of the second program voltage as much as a third voltage.

### Claim 17 (depends on 16)

The nonvolatile memory device of claim 16, wherein a difference between a level of the second program voltage finally applied to the selected word line before the program operation is suspended and a level of the second program voltage applied first to the selected word line after the suspended program operation is resumed corresponds to a fourth voltage different from the third voltage.

### Claim 18

A storage device comprising:
a nonvolatile memory device including memory cells; and
a controller configured to transmit a write command associated with memory cells selected from the memory cells to the nonvolatile memory device, to transmit a suspend command for suspending the write command to the nonvolatile memory device before a program operation is completed, and to transmit a resume command for resuming the write command to the nonvolatile memory device,
wherein, in response to the write command, the nonvolatile memory device is configured to apply a program voltage to the selected memory cells repeatedly while increasing the program voltage as much as a first increment,
wherein the controller transmits information about a second increment of the program voltage to be applied to the selected memory cells to the nonvolatile memory device together with the resume command, and
wherein the nonvolatile memory device increases the program voltage as much as the second increment in response to the resume command.

### Claim 19 (depends on 18)

The storage device of claim 18, wherein the controller is further configured to:
count a time between the suspend command and the resume command; and
determine the second increment based on the counted time.

### Claim 20 (depends on 18)

The storage device of claim 18, wherein the controller is further configured to:
determine the second increment based on machine learning.
