# US 2021/0343243 A1 · Method for operating display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0343243 A1 - Document ID: US20210343243A1 - Status: Published application - Kind: A1 - Application number: 17/273,818 - Filed: 2019-08-30 - Published: 2021-11-04 - Earliest claimed: 2018-09-12 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Kei TAKAHASHI; Koji KUSUNOKI; Kouhei TOYOTAKA; Susumu KAWASHIMA; Kazunori WATANABE - Web page: https://patentgrep.com/patent/US20210343243A1 ## CPC - H10W 90/00: Package configurations - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element - H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout} - G09G 2300/043: Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0852: being a dynamic memory with more than one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A display device that can correct the threshold voltage of a driving transistor without a correction of image data is provided. A display device including a pixel provided with a driving transistor, a display element, and a memory circuit and a correction data generation circuit is related. One of a source and a drain of the driving transistor is electrically connected to one electrode of the display element, and a gate of the driving transistor is electrically connected to the memory circuit. In a first period, the correction data generation circuit generates correction data that is data for correcting the threshold voltage of the driving transistor. In a second period, first data is written to the memory circuit. In a third period, second data is supplied to the pixel, whereby third data in which the second data is added to the first data is generated. In a fourth period, an image corresponding to the third data is displayed by the display element. ## Claims ### Claim 1 A method for operating a display device comprising a pixel provided with a transistor, a display element, and a memory circuit and a correction data generation circuit, wherein one of a source and a drain of the transistor is electrically connected to one electrode of the display element, and wherein a gate of the transistor is electrically connected to the memory circuit, the method comprising: generating correction data, which is data for correcting a threshold voltage of the transistor, in the correction data generation circuit in a first period; writing first data to the memory circuit in a second period; supplying second data to the pixel in a third period to generate third data, which is data in which the second data is added to the first data; and displaying an image corresponding to the third data by the display element in a fourth period. ### Claim 2 (depends on 1) The method for operating the display device according to claim 1, wherein, in the first period, after the correction data is generated in the correction data generation circuit, a potential corresponding to the correction data is supplied to a back gate of the transistor. ### Claim 3 (depends on 1) The method for operating the display device according to claim 1, wherein, in the first period, current is fed to the transistor and the correction data corresponding to the current is generated in the correction data generation circuit. ### Claim 4 (depends on 3) The method for operating the display device according to claim 3, wherein the correction data is generated in the correction data generation circuit such that the current flowing through the transistor is lower than or equal to a certain value in the first period. ### Claim 5 (depends on 1) The method for operating the display device according to claim 1, wherein no current is fed to the display element in the first period, and wherein current is fed to the display element in the fourth period. ### Claim 6 A method for operating a display device comprising a pixel provided with a first transistor, a second transistor, a third transistor, a capacitor, and a display element and a correction data generation circuit, wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the capacitor, wherein one of a source and a drain of the second transistor is electrically connected to the other electrode of the capacitor, wherein the other electrode of the capacitor is electrically connected to a gate of the third transistor, and wherein one of a source and a drain of the third transistor is electrically connected to one electrode of the display element, the method comprising: generating correction data, which is data for correcting a threshold voltage of the third transistor, in the correction data generation circuit in a first period; supplying a first potential to the other electrode of the capacitor in a second period; supplying a second potential to the one electrode of the capacitor in a third period so that a potential of the other electrode of the capacitor becomes a third potential; and allowing current corresponding to the third potential to flow through the display element in a fourth period. ### Claim 7 (depends on 6) The method for operating the display device according to claim 6, wherein, in the first period, after the correction data is generated in the correction data generation circuit, a potential corresponding to the correction data is supplied to a back gate of the third transistor. ### Claim 8 (depends on 6) The method for operating the display device according to claim 6, wherein the pixel comprises a fourth transistor, wherein one of a source and a drain of the fourth transistor is electrically connected to the one of the source and the drain of the third transistor, and wherein, in the first period, the fourth transistor is turned on to allow current to flow through the third and fourth transistors and the correction data generation circuit generates the correction data corresponding to the current. ### Claim 9 (depends on 8) The method for operating the display device according to claim 8, wherein the correction data is generated in the correction data generation circuit such that the current flowing through the third transistor is lower than or equal to a certain value in the first period. ### Claim 10 (depends on 8) The method for operating the display device according to claim 8, wherein the fourth transistor is turned off in the fourth period. ### Claim 11 (depends on 6) The method for operating the display device according to claim 6, wherein the second transistor comprises a metal oxide in a channel formation region, and wherein the metal oxide comprises In, Zn, and M (M is Al, Ti, Ga, Ge, Sn, Y, Zr, La, Ce, Nd, or Hf). ### Claim 12 (depends on 1, 6) The method for operating the display device according to claim 1 or claim 6, wherein the display element is an organic EL element. ### Claim 13 (depends on 6) The method for operating the display device according to claim 6, wherein the display element is an organic EL element.