# US 2021/0342149 A1 · Method for executing instructions, device, and computer readable storage medium > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0342149 A1 - Document ID: US20210342149A1 - Status: Published application - Kind: A1 - Application number: 17/377,548 - Filed: 2021-07-16 - Published: 2021-11-04 - Earliest claimed: 2020-07-20 - Assignees: Beijing Baidu Netcom Science Technology Co., Ltd. - Applicants: Beijing Baidu Netcom Science and Technology Co., Ltd. - Inventors: Chao TANG; Xueliang DU - Web page: https://patentgrep.com/patent/US20210342149A1 ## CPC - G06F 9/3004: {to perform operations on memory} - G06F 3/061: {Improving I/O performance} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F 9/30087: {Synchronisation or serialisation instructions} - G06F 9/3834: {Maintaining memory consistency} - G06F 12/1441: {for a range} - G06F 2212/1052: Security improvement - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract The disclosure discloses a method for executing instructions, a device and a computer readable storage medium. The detailed implementation includes: obtaining a first memory access instruction for execution, in which the first memory access instruction includes a first address range of a memory to be accessed; in response to detecting a predetermined instruction for monitoring an accessed address range of the memory, executing the predetermined instruction to obtain a remaining address range not accessed by the first memory access instruction in the first address range; comparing the remaining address range with a second address range included in a second memory access instruction to be executed; and suspending execution of the second memory access instruction in response to the remaining address range at least partially overlapping with the second address range. ## Claims ### Claim 1 A method for executing instructions, comprising: obtaining a first memory access instruction for execution, wherein the first memory access instruction comprises a first address range of a memory to be accessed; in response to detecting a predetermined instruction for monitoring an accessed address range of the memory, executing the predetermined instruction to obtain a remaining address range not accessed by the first memory access instruction in the first address range; comparing the remaining address range with a second address range comprised in a second memory access instruction to be executed; and suspending execution of the second memory access instruction in response to the remaining address range at least partially overlapping with the second address range. ### Claim 2 (depends on 1) The method according to claim 1, further comprising: continuing to execute the suspended second memory access instruction in response to an overlapping range between the remaining address range and the second address range having been accessed by the first memory access instruction. ### Claim 3 (depends on 1) The method according to claim 1, further comprising: executing the second memory access instruction in response to the remaining address range not overlapping with the second address range. ### Claim 4 (depends on 1) The method according to claim 1, wherein obtaining the first memory access instruction comprises: receiving the first memory access instruction; determining the first address range comprised in the first memory instruction; and storing the first address range into a register or a cache. ### Claim 5 (depends on 1) The method according to claim 1, wherein obtaining the remaining address range comprises: determining the accessed address range that has been accessed by the first memory instruction in response to detecting the predetermined instruction; and determining the remaining address interval based on the accessed address range. ### Claim 6 (depends on 1) The method according to claim 1, further comprising: obtaining the remaining address range in each clock cycle. ### Claim 7 (depends on 1) The method according to claim 1, further comprising: executing a third program instruction in response to no predetermined instruction for monitoring the address range of the memory being detected. ### Claim 8 An electronic device, comprising: one or more processors; and a memory, configured to store one or more programs; wherein the memory is configured to store instructions executable by the one or more programs, when the instructions are executed by the one or more processors, the one or more processors are configured to: obtain a first memory access instruction for execution, wherein the first memory access instruction comprises a first address range of a memory to be accessed; in response to detecting a predetermined instruction for monitoring an accessed address range of the memory, execute the predetermined instruction to obtain a remaining address range not accessed by the first memory access instruction in the first address range; compare the remaining address range with a second address range comprised in a second memory access instruction to be executed; and suspend execution of the second memory access instruction in response to the remaining address range at least partially overlapping with the second address range. ### Claim 9 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: execute the suspended second memory access instruction in response to an overlapping range between the remaining address range and the second address range having been accessed by the first memory access instruction. ### Claim 10 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: execute the second memory access instruction in response to the remaining address range not overlapping with the second address range. ### Claim 11 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: receive the first memory access instruction; determine the first address range comprised in the first memory instruction; and store the first address range into a register or a cache. ### Claim 12 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: determine the accessed address range that has been accessed by the first memory instruction in response to detecting the predetermined instruction; and determine the remaining address interval based on the accessed address range. ### Claim 13 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: obtain the remaining address range in each clock cycle. ### Claim 14 (depends on 8) The electronic device according to claim 8, wherein the one or more processors are configured to: execute a third program instruction in response to no predetermined instruction for monitoring the address range of the memory being detected. ### Claim 15 A non-transitory computer readable storage medium storing computer instructions, wherein the computer instructions are configured to cause the computer to execute a method for executing instructions, the method comprises: obtaining a first memory access instruction for execution, wherein the first memory access instruction comprises a first address range of a memory to be accessed; in response to detecting a predetermined instruction for monitoring an accessed address range of the memory, executing the predetermined instruction to obtain a remaining address range not accessed by the first memory access instruction in the first address range; comparing the remaining address range with a second address range comprised in a second memory access instruction to be executed; and suspending execution of the second memory access instruction in response to the remaining address range at least partially overlapping with the second address range. ### Claim 16 (depends on 15) The storage medium according to claim 15, wherein the method further comprises: continuing to execute the suspended second memory access instruction in response to an overlapping range between the remaining address range and the second address range having been accessed by the first memory access instruction. ### Claim 17 (depends on 15) The storage medium according to claim 15, wherein the method further comprises: executing the second memory access instruction in response to the remaining address range not overlapping with the second address range. ### Claim 18 (depends on 15) The storage medium according to claim 15, wherein obtaining the first memory access instruction comprises: receiving the first memory access instruction; determining the first address range comprised in the first memory instruction; and storing the first address range into a register or a cache. ### Claim 19 (depends on 15) The storage medium according to claim 15, wherein obtaining the remaining address range comprises: determining the accessed address range that has been accessed by the first memory instruction in response to detecting the predetermined instruction; and determining the remaining address interval based on the accessed address range. ### Claim 20 (depends on 15) The storage medium according to claim 15, wherein the method further comprises: obtaining the remaining address range in each clock cycle.