# US 2021/0342117 A1 · Processing with compact arithmetic processing element

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- Number: US 2021/0342117 A1
- Document ID: US20210342117A1
- Status: Published application
- Kind: A1
- Application number: 17/367,071
- Filed: 2021-07-02
- Published: 2021-11-04
- Earliest claimed: 2009-06-19
- Assignees: Singular Computing LLC
- Applicants: Singular Computing LLC
- Inventors: Joseph Bates
- Web page: https://patentgrep.com/patent/US20210342117A1

## CPC

- G06F 7/483: Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers {(G06F7/4806, G06F7/4824, G06F7/49, G06F7/491, G06F7/544 take precedence)}
- G06F 7/38: Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F 7/4833: {Logarithmic number system}
- G06F 7/5235: {using indirect methods, e.g. quarter square method, via logarithmic domain}
- H03K 19/17728: Reconfigurable logic blocks, e.g. lookup tables
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

Low precision computers can be efficient at finding possible answers to search problems. However, sometimes the task demands finding better answers than a single low precision search. A computer system augments low precision computing with a small amount of high precision computing, to improve search quality with little additional computing.

## Claims

### Claim 1

A device comprising:
at least one instruction memory adapted to store at least one instruction;
a plurality of low precision high dynamic range (LPHDR) execution units, wherein each LPHDR execution unit is adapted to execute a first operation on a first input signal that is a floating-point representation of a first numerical value to produce a first output signal representing a second numerical value, wherein the first operation is multiplication and wherein at least one LPHDR execution unit has access to memory local to that LPHDR execution unit; and
circuitry adapted to decode at least one instruction received from the at least one instruction memory and to send at least one control signal to at least one LPHDR execution unit to cause the at least one LPHDR execution unit to operate according to the at least one instruction;
wherein the dynamic range of possible valid inputs to the first operation is at least as wide as from 1/1,000,000,000 through 1,000,000,000 and for at least X=10% of the possible valid inputs to the first operation, the numerical value represented by the first output signal of the LPHDR unit executing the first operation on that input differs by at least Y=0.1% from the result of an exact mathematical calculation of the first operation on the numerical values of that same input;
wherein a number of LPHDR execution units in the device exceeds, by at least 20 more than three times, a non-negative integer number of high-precision execution units in the device adapted to execute the operation of multiplication on floating point numbers that are at least 32 bits wide;
wherein at least one of the LPHDR execution units is smaller than at least one of the high-precision execution units; and
wherein the plurality of LPHDR execution units are adapted to collectively perform, per cycle, at least tens of thousands of the first operations.

### Claim 2 (depends on 1)

The device of claim 1, wherein each of the LPHDR execution units is smaller that each of the high-precision execution units.

### Claim 3 (depends on 1)

The device of claim 1, wherein the number of LPHDR execution units in the device exceeds, by at least 100 more than five times, the non-negative integer number of high-precision execution units in the device.

### Claim 4 (depends on 1)

The device of claim 1, wherein the number of LPHDR execution units in the device exceeds, by at least 1000 more than five times, the non-negative integer number of high-precision execution units in the device.

### Claim 5 (depends on 2)

The device of claim 2, wherein the number of LPHDR execution units in the device exceeds, by at least 1000 more than five times, the non-negative integer number of high-precision execution units in the device.

### Claim 6 (depends on 1)

The device of claim 1, wherein the number of LPHDR execution units in the device exceeds, by at least 5000 more than five times, the non-negative integer number of high-precision execution units in the device.

### Claim 7 (depends on 1)

The device of claim 1, further comprising local connections between the LPHDR execution units and a host connection for connecting the plurality of LPHDR execution units to at least one host computer, wherein:
the local connections are adapted to send and receive a first plurality of data flows,
the host connection is adapted to send and receive a second plurality of data flows to and from the at least one host computer, and
a bandwidth of the second plurality of data flows is more limited than a bandwidth of the first plurality of data flows.

### Claim 8 (depends on 7)

The device of claim 7, wherein the number of LPHDR execution units in the device exceeds, by at least 1000 more than five times, the non-negative integer number of high-precision execution units in the device.

### Claim 9 (depends on 1)

The device of claim 1, wherein X=20%.

### Claim 10 (depends on 1)

The device of claim 1, wherein the first operation corresponds to determining a weighted sum.

### Claim 11 (depends on 4)

The device of claim 4 wherein the first operation corresponds to determining a weighted sum.

### Claim 12 (depends on 5)

The device of claim 5, wherein the first operation corresponds to determining a weighted sum.

### Claim 13 (depends on 1)

The device of claim 1, wherein the first operation corresponds to convolving a kernel.

### Claim 14 (depends on 4)

The device of claim 4, wherein the first operation corresponds to convolving a kernel.

### Claim 15 (depends on 5)

The device of claim 5, wherein the first operation corresponds to convolving a kernel.

### Claim 16 (depends on 1)

The device of claim 1, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

### Claim 17 (depends on 11)

The device of claim 11, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

### Claim 18 (depends on 12)

The device of claim 12, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

### Claim 19 (depends on 14)

The device of claim 14, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

### Claim 20 (depends on 15)

The device of claim 15, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

### Claim 21 (depends on 1)

The device of claim 1, wherein the at least one instruction is part of a software application programmed to process visual information.

### Claim 22 (depends on 11)

The device of claim 11, wherein the at least one instruction is part of a software application programmed to process visual information.

### Claim 23 (depends on 12)

The device of claim 12, wherein the at least one instruction is part of a software application programmed to process visual information.

### Claim 24 (depends on 14)

The device of claim 14, wherein the at least one instruction is part of a software application programmed to process visual information.

### Claim 25 (depends on 15)

The device of claim 15, wherein the at least one instruction is part of a software application programmed to process visual information.

### Claim 26 (depends on 1)

The device of claim 1, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

### Claim 27 (depends on 11)

The device of claim 11, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

### Claim 28 (depends on 12)

The device of claim 12, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

### Claim 29 (depends on 14)

The device of claim 14, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

### Claim 30 (depends on 15)

The device of claim 15, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.
