# US 2021/0334200 A1 · Storing translation layer metadata in host memory buffer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0334200 A1 - Document ID: US20210334200A1 - Status: Published application - Kind: A1 - Application number: 16/855,245 - Filed: 2020-04-22 - Published: 2021-10-28 - Earliest claimed: 2020-04-22 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Peng Xu - Web page: https://patentgrep.com/patent/US20210334200A1 ## CPC - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G06F 9/5016: {the resource being the memory} - G06F 11/1004: {to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00)} - G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)} - G06F 11/1076: {Parity data used in redundant arrays of independent storages, e.g. in RAID systems} - G06F 12/0833: {in combination with broadcast means (e.g. for invalidation or updating)} - G06F 13/1673: {using buffers} - G06F 13/4221: {being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus} - G06F 2212/7201: Logical to physical mapping or translation of blocks or pages - G06F 2212/7207: management of metadata or control data - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An example method of storing translation layer metadata in a host memory buffer comprises: retrieving, from the first memory device, translation layer metadata comprising one or more logical-to-physical (L2P) records, wherein an L2P record of the one or more of L2P records maps a logical block address to a physical address identifying a memory block in the memory system; generating protection metadata for at least a portion of the translation layer metadata; and causing a host system connected to the memory system to store the portion of the translation layer metadata and the protection metadata in a host memory buffer residing on a second memory device of the host system. ## Claims ### Claim 1 A memory system, comprising: a first memory device; and a processing device, operatively coupled to the first memory device, the processing device to perform operations comprising: retrieving, from the first memory device, translation layer metadata comprising one or more logical-to-physical (L2P) records, wherein an L2P record of the one or more of L2P records maps a logical block address to a physical address identifying a memory block in the memory system; generating protection metadata for at least a portion of the translation layer metadata; and causing a host system connected to the memory system to store the portion of the translation layer metadata and the protection metadata in a host memory buffer residing on a second memory device of the host system. ### Claim 2 (depends on 1) The system of claim 1, wherein the first memory device is a non-volatile memory device. ### Claim 3 (depends on 1) The system of claim 1, wherein the second memory device is a volatile memory device. ### Claim 4 (depends on 1) The system of claim 1, wherein the generating the protection metadata further comprises: computing a cyclic redundancy check value for the portion of the translation layer metadata. ### Claim 5 (depends on 1) The system of claim 1, wherein the operations further comprise: requesting the host system to allocate the host memory buffer of a specified size. ### Claim 7 (depends on 1) The system of claim 1, wherein the operations further comprise: receiving, from the host system, the portion of the translation layer metadata and the protection metadata; responsive to successfully validating, based on the protection metadata, the portion of the translation layer metadata, utilizing the portion of the translation layer metadata for performing a memory access operation. ### Claim 7 (depends on 7) The system of claim 7, wherein the operations further comprise: responsive to modifying the translation layer metadata, storing the translation layer metadata on a non-volatile memory device of the memory system. ### Claim 8 A method comprising: receiving, by a processing device of a memory system, from the host system, translation layer metadata and associated protection metadata, wherein the translation layer metadata comprises one or more logical-to-physical (L2P) records, wherein an L2P record of the one or more of L2P records maps a logical block address to a physical address identifying a memory block in the memory system; validating, using the associated protection metadata, the translation layer metadata; and utilizing the translation layer metadata for performing a memory access operation. ### Claim 9 (depends on 8) The method of claim 8, further comprising: responsive to validating the translation layer metadata, storing the translation layer metadata on a volatile memory device of the memory system. ### Claim 10 (depends on 8) The method of claim 8, further comprising: responsive to modifying the translation layer metadata, storing the translation layer metadata on a non-volatile memory device of the memory system. ### Claim 11 (depends on 8) The method of claim 8, wherein validating the translation layer metadata further comprises: computing a cyclic redundancy check value for the translation layer metadata. ### Claim 12 (depends on 8) The method of claim 8, further comprising: retrieving the translation layer metadata from a non-volatile memory device of the memory system; generating the associated protection metadata for at least a portion of the translation layer metadata; and causing the host system to store the portion of the translation layer metadata and the associated protection metadata in a host memory buffer residing on a volatile memory device of the host system. ### Claim 13 (depends on 8) The method of claim 8, wherein receiving the translation layer metadata from the host system is performed via a PCIe interface. ### Claim 14 (depends on 8) The method of claim 8, wherein utilizing the translation layer metadata for performing the memory access operation further comprises: performing at least one of: a read operation or a write operation with respect to a physical address specified by the translation layer metadata. ### Claim 15 A method comprising: retrieving, by a processing device of a memory system, from a non-volatile memory device of the memory system, translation layer metadata comprising one or more logical-to-physical (L2P) records, wherein an L2P record of the one or more of L2P records maps a logical block address to a physical address identifying a memory block in the memory system; storing the translation layer metadata on a volatile memory device of the memory sub-system; retrieving, from the volatile memory device, at least a portion of the translation layer metadata; generating protection metadata for the portion of the translation layer metadata; and causing a host system connected to the memory system to store the portion of the translation layer metadata and the protection metadata in a host memory buffer residing on a non-volatile memory device of the host system. ### Claim 17 (depends on 15) The method of claim 15, wherein the generating the protection metadata further comprises: computing a cyclic redundancy check value for the portion of the translation layer metadata. ### Claim 17 (depends on 15) The method of claim 15, further comprising: requesting the host system to allocate the host memory buffer of a specified host memory buffer size. ### Claim 18 (depends on 15) The method of claim 15, further comprising: receiving, from the host system, the portion of the translation layer metadata and the protection metadata; responsive to successfully validating, based on the protection metadata, the portion of the translation layer metadata, utilizing the portion of the translation layer metadata for performing a memory access operation. ### Claim 19 (depends on 15) The method of claim 15, further comprising: storing the portion of the translation layer metadata on the first memory device. ### Claim 20 (depends on 15) The method of claim 15, wherein receiving the translation layer metadata from the host system is performed via a PCIe interface.