# US 2021/0333333 A1 · Abnormal power supply voltage detection device and method for detecting abnormal power supply voltage > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0333333 A1 - Document ID: US20210333333A1 - Status: Published application - Kind: A1 - Application number: 16/855,814 - Filed: 2020-04-22 - Published: 2021-10-28 - Earliest claimed: 2020-04-22 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Tadashi KAMEYAMA; Masanori IKEDA; Masataka MINAMI; Kenichi SHIMADA; Yukitoshi TSUBOI - Web page: https://patentgrep.com/patent/US20210333333A1 ## CPC - G01R 19/16552: {in I.C. power supplies} - G01R 31/40: Testing power supplies (testing photovoltaic devices H02S50/10) - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract The abnormal power supply voltage detection device has a function of accurately detecting the abnormal voltage in accordance with the characteristics of the semiconductor element for each semiconductor chip. Circuit group for operating the adjustment function has a function of preventing the influence of the power supply voltage of the logic system such as control in the semiconductor product malfunctions becomes abnormal. Furthermore, it has a function of detecting the abnormal voltage of the various power supplies in the semiconductor product. It also has a function to test the abnormal voltage detection function in the normal power supply voltage range during use of semiconductor products. ## Claims ### Claim 1 An abnormal power supply voltage detection device comprising: a plurality of core power supply areas connected by the first power supply voltage line and the second power supply voltage line and an abnormal voltage output unit wherein at least one of the plurality of core power supply areas has an abnormal voltage detection unit, wherein the abnormal voltage detection unit monitors the voltage in the other core power supply areas through the first power supply voltage line, when detecting an abnormal voltage transmits an abnormal voltage detection signal to the abnormal voltage output unit through the second power supply voltage line. ### Claim 2 (depends on 1) The abnormal power supply voltage detection device according to claim 1, wherein the abnormal voltage detection unit has a first logic control unit, a temperature dependent shift condition setting signal received from the outside through the BUS, an under lower limit voltage condition setting signal, and an over upper limit voltage condition setting signal, characterized in that transmitting to the first analog voltage unit. ### Claim 3 (depends on 2) The abnormal power supply voltage detection device according to claim 2, wherein the abnormal voltage detection unit has: a first UVLSC for inputting the temperature dependent shift condition setting signal and outputting a signal obtained by adding the signal transmission delay time, and a second UVLSC for inputting the lower limit voltage condition setting signal and outputting a signal obtained by adding the signal voltage delay time, and a third UVLSC for inputting the over upper limit voltage setting signal and outputting a signal obtained by adding the signal transmission delay time. ### Claim 4 (depends on 3) The abnormal power supply voltage detection device according to claim 3, wherein the first analog voltage unit has: a first latch for inputting the temperature dependent shift condition setting signal and the output signal of the first UVLSC, and a second latch for inputting the output of the second UVLSC and the under lower limit voltage condition setting signal, and a third latch for inputting the output of the third UVLSC and the over upper limit voltage condition setting signal, and a first temperature dependent shifting unit for inputting the output of the first latch and the output of the second latch, and a second temperature dependent shifting unit for inputting the output of the first latch and the output of the third latch, and an under low limit voltage detection unit for inputting the output and the detection voltage of the first temperature dependent shift unit, and an over upper limit voltage detection unit for inputting the output and the detection voltage of the second temperature dependent shift unit, and a 2input 1-output OR unit for inputting the output of the under low limit voltage detection unit and outputting the over high limit voltage detection unit, wherein the first analog voltage unit transmits the output of an under low limit voltage detection unit and the output of the over upper limit voltage detection unit. ### Claim 5 (depends on 1) The abnormal power supply voltage detection device according to claim 1, wherein the abnormal voltage output unit has a second logic control unit, characterized in that transmitting CIVFD setting signal received from the outside through the BUS to the second analog voltage unit. ### Claim 6 (depends on 5) The abnormal power supply voltage detection device according to claim 5, wherein the abnormal voltage output unit, CIVFD setting signal as an input, characterized in that it has a fourth UVLSC of outputting a signal obtained by adding the signal transmission delay time. ### Claim 7 (depends on 5) The abnormal power supply voltage detection device according to claim 5, wherein the second analog voltage unit has: a fourth UVLSC for inputting CIVFD setting signals, and a fourth latch for inputting CIVFD setting signals and the outputs of the fourth UVLSC, and a selector for selecting a desired output from a plurality of CIVFD outputs, and an output buffer for outputting selected output to outside. ### Claim 8 (depends on 2) The abnormal power supply voltage detection device according to claim 2, wherein the first logic control unit and the second logic control unit are disposed in the core power supply area. ### Claim 9 (depends on 4) The abnormal power supply voltage detection device according to claim 4, wherein the first analog detection unit and the second analog detection unit are disposed in the analog power supply area included in the core power supply area. ### Claim 10 (depends on 3) The abnormal power supply voltage detection device according to claim 3, wherein the first UVLSC and the second UVLSC and the third UVLSC and the fourth UVLSC are arranged across the core power supply area and the analog power supply area. ### Claim 11 A abnormal power supply voltage detection device comprising: a plurality of core power supply areas connected by the first power supply voltage line and the second power supply voltage line and an abnormal voltage output unit wherein at least one of the plurality of core power supply areas has an abnormal voltage detection unit, wherein the abnormal voltage detection unit monitors the voltage in the other core power supply areas disposed by itself through the first power supply voltage line, when detecting an abnormal voltage transmits an abnormal voltage detection signal to the abnormal voltage output unit through the second power supply voltage line. ### Claim 12 A method for detecting abnormal power supply voltage in semiconductor device having a plurality of core power supply areas and the abnormal voltage output unit connected by the first power supply voltage line and the second power supply voltage line, at least one of the plurality of core power supply areas has an abnormal voltage detection unit, the abnormal voltage detection unit monitors the voltage in the other core power supply areas through the first power supply voltage line, when detecting an abnormal voltage transmits an abnormal voltage detection signal to the abnormal voltage output unit through the second power supply voltage line.