# US 2021/0333310 A1 · Current sensing circuit

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- Number: US 2021/0333310 A1
- Document ID: US20210333310A1
- Status: Published application
- Kind: A1
- Application number: 17/129,113
- Filed: 2020-12-21
- Published: 2021-10-28
- Earliest claimed: 2020-04-23
- Assignees: Cirrus Logic International Semiconductor Ltd.
- Applicants: Cirrus Logic International Semiconductor Ltd.
- Inventors: Dipankar NAG; Peter HSU; Kapil R. SHARMA; Gordon J. BATES; Simon R. FOSTER; Mark J. MCCLOY-STEVENS
- Web page: https://patentgrep.com/patent/US20210333310A1

## CPC

- G01R 19/2509: {Details concerning sampling, digitizing or waveform capturing}
- G01R 1/30: Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
- G01R 19/0092: {Measuring current only}
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- G01R 19/0053: {Noise discrimination; Analog sampling; Measuring transients (measuring characteristics of individual pulses G01R29/02; digital sampling G01R19/2509; measuring noise figure G01R29/26)}
- H03F 2200/129: there being a feedback over the complete amplifier
- H03F 2200/171: A filter circuit coupled to the output of an amplifier
- H03F 2200/462: the current being sensed
- H03F 2203/45116: Feedback coupled to the input of the differential amplifier
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H03F: AMPLIFIERS

## Abstract

The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

## Claims

### Claim 1

Current sensing circuitry, comprising:
a differential amplifier comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal;
a first current source;
a second current source; and
a switch network operable in:
a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and
a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.

### Claim 2 (depends on 1)

Current sensing circuitry according to claim 1 wherein the differential amplifier comprises a differential chopper amplifier.

### Claim 3 (depends on 2)

Current sensing circuitry according to claim 2 wherein the differential chopper amplifier is configured to be chopped between a first chopping configuration and a second chopping configuration at a first chopping frequency and said switch network is operable to chop between the first phase and the second phase at a second chopping frequency.

### Claim 4 (depends on 3)

Current sensing circuitry according to claim 3 wherein the first chopping frequency and the second chopping frequency are the same frequency as one another.

### Claim 5 (depends on 4)

Current sensing circuitry according to claim 4 wherein the first chopping frequency and the second chopping frequency are derived from a common clock signal.

### Claim 6 (depends on 4)

Current sensing circuitry according to claim 4 wherein the first chopping frequency and the second chopping frequency are synchronous and separated by a delay.

### Claim 7 (depends on 1)

Current sensing circuitry according to claim 1 wherein the first current source and the second current source are configured to generate equal bias currents to one another.

### Claim 8 (depends on 1)

Current sensing circuitry according to claim 1 implemented as an integrated circuit.

### Claim 9 (depends on 1)

Current sensing circuitry according to claim 1 wherein the differential amplifier comprises a differential-to-single-ended amplifier.

### Claim 10

Current sensing circuitry, comprising:
a first stage comprising:
a differential amplifier comprising first and second inputs configured to sense a current across a sense resistance, and, an output configured to output an output current signal;
first and second current sources; and
a current source chopper comprising a switch network operable to chop the first and second current sources between the first input and the output;
a second stage comprising a current-to-voltage converter configured to receive the measurement current and output a voltage signal representative of the current across the sense resistance; and
a third stage comprising an analogue-to-digital converter (ADC) configured to convert the voltage signal to a digital output voltage signal.

### Claim 11 (depends on 10)

Current sensing circuitry according to claim 10 wherein the current-to-voltage converter comprises a trans-impedance amplifier (TIA).

### Claim 12 (depends on 11)

Current sensing circuitry according to claim 11 wherein the TIA comprises an anti-aliasing filter.

### Claim 13 (depends on 11)

Current sensing circuitry according to claim 11 wherein the ADC is configured to receive a first reference voltage to drive the ADC, wherein the TIA comprises a first TIA input configured to receive the measurement current and a second TIA input configured to receive a second reference voltage derived from the first reference voltage.

### Claim 14 (depends on 10)

Current sensing circuitry according to claim 10 further comprising a low-pass filter and wherein the current source chopper is operable to chop the first and second current sources between the first input and the output at a chopping frequency and a cut-off frequency of the low-pass filter is less than the chopping frequency of the current source chopper.

### Claim 15 (depends on 14)

Current sensing circuitry according to claim 14 wherein the ADC comprises the low-pass filter.

### Claim 16 (depends on 10)

Current sensing circuitry according to claim 10 wherein the differential amplifier comprises a differential chopper amplifier.

### Claim 17 (depends on 16)

Current sensing circuitry according to claim 16 wherein the differential chopper amplifier is operable to repeatedly swap between a first chopper configuration and a second chopper configuration at a first chopping frequency; and
wherein the current source chopper is operable to chop the first and second level shifting current sources between the first input and the output based at a second chopping frequency; and
wherein the first chopping frequency and the second chopping frequency are configured to be at the same frequency as one another.

### Claim 18 (depends on 17)

Current sensing circuitry according to claim 17 wherein the first chopping frequency and the second chopping frequency have a predetermined relationship to a sampling frequency of the ADC.

### Claim 19 (depends on 10)

Current sensing circuitry according to claim 10 wherein the differential amplifier comprises a differential-to-single-ended amplifier.

### Claim 20

Current sensing circuitry, comprising:
a differential-to-single-ended amplifier configured to sense a current across a sense resistance and output a current sense signal; and
first and second current sources configured to provide level shifting at an input of the differential-to-single-ended amplifier and at an output of the differential-to-single-ended amplifier, wherein the first and second current sources are chopped between the input of the differential-to-single-ended amplifier and the output of the differential-to-single-ended amplifier.
