Frequency detection circuit

A frequency detection circuit comprising:

• a first signal source to output a first clock signal;
• a second signal source to output a second clock signal having a same frequency as but a different phase from those of the first clock signal;
• a first sample hold circuit to undersample a reception signal using the first clock signal, and to output the undersampled reception signal as an output signal;
• a second sample hold circuit to undersample the reception signal using the second clock signal, and to output the undersampled reception signal as an output signal;
• and
• a frequency calculating circuit to calculate a frequency of the reception signal using a phase difference between the output signals of the first sample hold circuit and the second sample hold circuit, wherein
• the frequency calculating circuit detects a frequency of the output signal of the first sample hold circuit, calculates an order of undersampling with respect to the reception signal using the phase difference, and calculates the frequency of the reception signal from the calculated order and the detected frequency.