# US 2021/0280697 A1 · Semiconductor device

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- Number: US 2021/0280697 A1
- Document ID: US20210280697A1
- Status: Published application
- Kind: A1
- Application number: 17/330,589
- Filed: 2021-05-26
- Published: 2021-09-09
- Earliest claimed: 2015-07-24
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei Yamazaki; Kenichi Okazaki; Junichi Koezuka; Tomonori Nakayama; Motoki Nakashima
- Web page: https://patentgrep.com/patent/US20210280697A1

## CPC

- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/80: characterised by the materials
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/67: Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)}
- H10D 30/798: {being provided in or under the channel regions}
- Y02E 10/549: Organic PV cells
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION

## Abstract

In a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The transistor includes an oxide semiconductor film over a first insulating film; a second insulating film over the oxide semiconductor film; a metal oxide film over the second insulating film; a gate electrode over the metal oxide film; and a third insulating film over the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a channel region overlapping with the gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film. The source region and the drain region contain one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a rare gas.

## Claims

### Claim 1

A semiconductor device comprising:
a first gate electrode;
a first insulating film over the first gate electrode;
an oxide semiconductor film over the first insulating film;
a second insulating film over the oxide semiconductor film;
a metal oxide film over the second insulating film;
a second gate electrode over the metal oxide film; and
a third insulating film over the second gate electrode,
wherein when an electron beam with a probe diameter of 1 nm is incident on the oxide semiconductor film, a plurality of spots are observed at a ring-like region in an electron diffraction pattern of the oxide semiconductor film,
wherein the second gate electrode is in contact with the first gate electrode through an opening in the first insulating film, the second insulating film and the metal oxide film, and
wherein the third insulating film is in contact with a top surface and a side surface of the second gate electrode, a side surface of the metal oxide film, a side surface of the second insulating film, and a part of a top surface of the oxide semiconductor film.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the oxide semiconductor film comprises In, Zn, and M, and
wherein M is Al, Ga, Y, or Sn.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the oxide semiconductor film comprises a channel region overlapping with the second gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film.

### Claim 4 (depends on 3)

The semiconductor device according to claim 3, further comprising:
a fourth insulating film over the third insulating film;
a source electrode connected to the source region through an opening in the third insulating film and the fourth insulating film; and
a drain electrode connected to the drain region through an opening in the third insulating film and the fourth insulating film.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the metal oxide film comprises a region in contact with the third insulating film.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the second insulating film comprises a region in contact with the third insulating film.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein an upper end portion of the second insulating film is positioned outside a lower end portion of the metal oxide film,
wherein an upper end portion of the metal oxide film is positioned outside a lower end portion of the second gate electrode, and
wherein the third insulating film is in contact with a top surface of the metal oxide film.

### Claim 8

A semiconductor device comprising:
a first gate electrode;
a first insulating film over the first gate electrode;
an oxide semiconductor film over the first insulating film;
a second insulating film over the oxide semiconductor film;
a metal oxide film over the second insulating film;
a second gate electrode over the metal oxide film; and
a third insulating film over the second gate electrode,
wherein when an electron beam with a probe diameter of 1 nm is incident on the oxide semiconductor film, a plurality of spots are observed at a ring-like region in an electron diffraction pattern of the oxide semiconductor film,
wherein the second gate electrode is in contact with the first gate electrode through an opening in the first insulating film, the second insulating film and the metal oxide film,
wherein the third insulating film is a nitride film comprising at least one of hydrogen and fluorine, and
wherein the third insulating film is in contact with a top surface and a side surface of the second gate electrode, a side surface of the metal oxide film, a side surface of the second insulating film, and a part of a top surface of the oxide semiconductor film.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8,
wherein the oxide semiconductor film comprises In, Zn, and M, and
wherein M is Al, Ga, Y, or Sn.

### Claim 10 (depends on 8)

The semiconductor device according to claim 8, wherein the oxide semiconductor film comprises a channel region overlapping with the second gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, further comprising:
a fourth insulating film over the third insulating film;
a source electrode connected to the source region through an opening in the third insulating film and the fourth insulating film; and
a drain electrode connected to the drain region through an opening in the third insulating film and the fourth insulating film.

### Claim 12 (depends on 8)

The semiconductor device according to claim 8, wherein the metal oxide film comprises a region in contact with the third insulating film.

### Claim 13 (depends on 8)

The semiconductor device according to claim 8, wherein the second insulating film comprises a region in contact with the third insulating film.

### Claim 14 (depends on 8)

The semiconductor device according to claim 8,
wherein an upper end portion of the second insulating film is positioned outside a lower end portion of the metal oxide film,
wherein an upper end portion of the metal oxide film is positioned outside a lower end portion of the second gate electrode, and
wherein the third insulating film is in contact with a top surface of the metal oxide film.