# US 2021/0280682 A1 · Semiconductor devices having gate structures with skirt regions > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0280682 A1 - Document ID: US20210280682A1 - Status: Published application - Kind: A1 - Application number: 17/329,240 - Filed: 2021-05-25 - Published: 2021-09-09 - Earliest claimed: 2015-01-14 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Jung-Gun YOU; Myung-Yoon UM; Young-Joon PARK; Jeong-Hyo LEE; Ji-Yong HA; Jun-sun HWANG - Web page: https://patentgrep.com/patent/US20210280682A1 ## CPC - H10D 64/518: {characterised by their lengths or sectional shapes} - H10D 30/024: {of fin field-effect transistors [FinFET]} - H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates} - H10D 30/6212: {having fin-shaped semiconductor bodies having non-rectangular cross-sections} - H10D 64/01: Manufacture or treatment - H10D 64/01324: {characterised by the sectional shape, e.g. T or inverted-T} - H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes} - H10D 64/519: {characterised by their top-view geometrical layouts} - H10D 84/0151: {Manufacturing their isolation regions} - H10D 84/0158: {the components including FinFETs} - H10D 84/0193: {the components including FinFETs} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 84/834: {comprising FinFETs} - H10D 84/853: {comprising FinFETs} - H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations} - H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations - H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain} - H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)} - H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes an active fin protruding upwardly from a substrate and extending in a first direction and a gate structure extending in a second direction intersecting to cross the active fin, where a first width of a lower portion of the gate structure that contacts the active fin is greater than a second width of the lower portion of the gate structure that is spaced apart from the active fin. ## Claims ### Claim at position 1 1-19. (canceled) ### Claim 20 A semiconductor device comprising: a first active fin protruding from a substrate and extending in a first direction; a second active fin protruding from the substrate and extending in the first direction, wherein the second active fin is spaced apart from the first active fin in a second direction that intersects the first direction; and a first gate structure extending in the second direction, the first gate structure includes a gate insulation layer, a work function control layer on the gate insulation layer and a conductive layer on the work function control layer, wherein the first gate structure includes a first skirt where a first side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin, a second skirt where a second side of the first gate structure, which is opposite the first side of the first gate structure, extends outwardly in the first direction to contact the side surface of the first active fin, a third skirt where the first side of the first gate structure extends outwardly in the first direction to contact a side surface of the second active fin, and a fourth skirt where the second side of the first gate structure extends outwardly in the first direction to contact the side surface of the second active fin, wherein each of outer surfaces of the first skirt, the second skirt, the third skirt, and the fourth skirt has a first concave profile at a lower half portion of the first gate structure in a vertical plane, wherein each of the outer surfaces of the first skirt, the second skirt, the third skirt, and the fourth skirt has a second concave profile in a horizontal plane, wherein an entirety of the first skirt having the first concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above a surface of the substrate, wherein the entirety of the first skirt having the second concave profile in the horizontal plane continuously increases in width, in the first direction, with decreasing distance to the side surface of the first active fin, wherein the first skirt includes the gate insulation layer and the work function control layer, an outer surface of the gate insulation layer of the first skirt has the first concave profile in the vertical plane, and an outer surface of the work function control layer of the first skirt has a third concave profile in the vertical plane, wherein an entirety of the work function control layer of the first skirt having the third concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate, and wherein the second concave profile in the horizontal plane converges with the first concave profile in the vertical plane. ### Claim 21 (depends on 20) The semiconductor device of claim 20, wherein a width of the first gate structure in the first direction decreases from the side surface of the first active fin to a region between the first active fin and the second active fin. ### Claim 22 (depends on 20) The semiconductor device of claim 20, further comprising a dummy gate structure extending in the second direction, to cross the first active fin, the first active fin having an end in the first direction under the dummy gate structure, wherein the dummy gate structure is spaced apart from the first gate structure in the first direction, and wherein the dummy gate structure includes a fifth skirt where a first side of the dummy gate structure facing the first side of the first gate structure extends outwardly in the first direction to contact the side surface of the first active fin and a sixth skirt where the first side of the dummy gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 23 (depends on 22) The semiconductor device of claim 22, wherein an outer surface of the fifth skirt has a fourth concave profile at a lower half portion of the dummy gate structure in the vertical plane, wherein the outer surface of the fifth skirt has a fifth concave profile in the horizontal plane, and wherein an entirety of the fifth skirt having the fourth concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate. ### Claim 24 (depends on 22) The semiconductor device of claim 22, wherein a second side of the dummy gate structure, which is opposite the first side of the dummy gate structure, is a planar side surface that does not include any skirt. ### Claim 25 (depends on 22) The semiconductor device of claim 22, further comprising a device isolation layer that extends in the second direction and is contact with the end of the first active fin, wherein the dummy gate structure is on the first active fin and the device isolation layer. ### Claim 26 (depends on 20) The semiconductor device of claim 20, further comprising a second gate structure extending in the second direction, wherein the second gate structure is spaced apart from the first gate structure, and wherein the second gate structure includes a seventh skirt where a first side of the second gate structure facing the second side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin and an eighth skirt where the first side of the second gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 27 (depends on 26) The semiconductor device of claim 26, wherein each of outer surfaces of the seventh and eighth skirts has the first concave profile at a lower half portion of the second gate structure in the vertical plane, wherein each of the outer surfaces of the seventh and eighth skirts has the second concave profile in the horizontal plane, and wherein an entirety of the seventh skirt having the first concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate. ### Claim 28 (depends on 26) The semiconductor device of claim 26, wherein a distance between the first gate structure and the second gate structure in the first direction increases from the side surface of the first active fin to a region between the first active fin and the second active fin. ### Claim 29 A semiconductor device comprising: a first active fin protruding from a substrate and extending in a first direction; a second active fin protruding from the substrate and extending in the first direction, wherein the second active fin is spaced apart from the first active fin in a second direction that intersects the first direction; and a first gate structure extending in the second direction, the first gate structure includes a gate insulation layer, a work function control layer on the gate insulation layer and a conductive layer on the work function control layer, wherein the first gate structure includes a first skirt where a first side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin, wherein an outer surface of the first skirt has a first concave profile at a lower half portion of the first gate structure in a vertical plane, wherein the outer surface of the first skirt has a second concave profile in a horizontal plane, wherein an entirety of the first skirt having the first concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above a surface of the substrate, wherein the first skirt includes the gate insulation layer and the work function control layer, an outer surface of the gate insulation layer of the first skirt has the first concave profile in the vertical plane, and an outer surface of the work function control layer of the first skirt has a third concave profile in the vertical plane, wherein an entirety of the work function control layer of the first skirt having the third concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate, and wherein the second concave profile in the horizontal plane converges with the first concave profile in the vertical plane. ### Claim 30 (depends on 29) The semiconductor device of claim 29, wherein the entirety of the first skirt having the second concave profile in the horizontal plane continuously increases in width, in the first direction, with decreasing distance to the side surface of the first active fin. ### Claim 31 (depends on 29) The semiconductor device of claim 29, wherein the first gate structure further includes a second skirt where a second side of the first gate structure, which is opposite the first side of the first gate structure, extends outwardly in the first direction to contact the side surface of the first active fin, a third skirt where the first side of the first gate structure extends outwardly in the first direction to contact a side surface of the second active fin, and a fourth skirt where the second side of the first gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 32 (depends on 29) The semiconductor device of claim 29, further comprising a dummy gate structure extending in the second direction, to cross the first active fin, the first active fin having an end in the first direction under the dummy gate structure, wherein the dummy gate structure is spaced apart from the first gate structure in the first direction, and wherein the dummy gate structure includes a fifth skirt where a first side of the dummy gate structure facing the first side of the first gate structure extends outwardly in the first direction to contact the side surface of the first active fin, and a sixth skirt where the first side of the dummy gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 33 (depends on 32) The semiconductor device of claim 32, wherein an outer surface of the fifth skirt has a fourth concave profile at a lower half portion of the dummy gate structure in the vertical plane, wherein the outer surface of the fifth skirt has a fifth concave profile in the horizontal plane, and wherein an entirety of the fifth skirt having the fourth concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate. ### Claim 34 (depends on 29) The semiconductor device of claim 29, further comprising a second gate structure extending in the second direction, wherein the second gate structure is spaced apart from the first gate structure, wherein the second gate structure includes a seventh skirt where a first side of the second gate structure facing a second side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin and an eighth skirt where the first side of the second gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 35 A semiconductor device comprising: a first active fin protruding from a substrate and extending in a first direction; a second active fin protruding from the substrate and extending in the first direction, wherein the second active fin is spaced apart from the first active fin in a second direction that intersects the first direction; and a first gate structure extending in the second direction, wherein the first gate structure includes a first skirt where a first side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin, a second skirt where a second side of the first gate structure, which is opposite the first side of the first gate structure, extends outwardly in the first direction to contact the side surface of the first active fin, a third skirt where the first side of the first gate structure extends outwardly in the first direction to contact a side surface of the second active fin, and a fourth skirt where the second side of the first gate structure extends outwardly in the first direction to contact the side surface of the second active fin, wherein each of outer surfaces of the first skirt, the second skirt, the third skirt, and the fourth skirt has a first concave profile at a lower half portion of the first gate structure in a vertical plane, wherein each of the outer surfaces of the first skirt, the second skirt, the third skirt, and the fourth skirt has a second concave profile in a horizontal plane, wherein an entirety of the first skirt having the first concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above a surface of the substrate, wherein the entirety of the first skirt having the second concave profile in the horizontal plane continuously increases in width, in the first direction, with decreasing distance to the side surface of the first active fin, wherein the second concave profile in the horizontal plane converges with the first concave profile in the vertical plane, and wherein a first width of the first gate structure in the first direction decreases from the side surface of the first active fin to a region between the first active fin and the second active fin. ### Claim 36 (depends on 35) The semiconductor device of claim 35, wherein the first gate structure includes a gate insulation layer, a work function control layer on the gate insulation layer and a conductive layer on the work function control layer. ### Claim 37 (depends on 36) The semiconductor device of claim 36, wherein the first skirt includes the gate insulation layer and the work function control layer, an outer surface of the gate insulation layer of the first skirt has the first concave profile in the vertical plane, and an outer surface of the work function control layer of the first skirt has a third concave profile in the vertical plane, and wherein an entirety of the work function control layer of the first skirt having the third concave profile in the vertical plane continuously decreases in width, in the first direction, with increasing height above the surface of the substrate. ### Claim 38 (depends on 35) The semiconductor device of claim 35, further comprising a second gate structure extending in the second direction, wherein the second gate structure is spaced apart from the first gate structure, wherein the second gate structure includes a fifth skirt where a first side of the second gate structure facing the second side of the first gate structure extends outwardly in the first direction to contact a side surface of the first active fin and a sixth skirt where the first side of the second gate structure extends outwardly in the first direction to contact the side surface of the second active fin. ### Claim 39 (depends on 38) The semiconductor device of claim 38, wherein a distance between the first gate structure and the second gate structure in the first direction increases from the side surface of the first active fin to a region between the first active fin and the second active fin.