# US 2021/0280480 A1 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0280480 A1 - Document ID: US20210280480A1 - Status: Published application - Kind: A1 - Application number: 17/010,926 - Filed: 2020-09-03 - Published: 2021-09-09 - Earliest claimed: 2020-03-09 - Assignees: Kioxia Corporation - Applicants: Kioxia Corporation - Inventors: Yuki SUGO; Ayana AMANO; Keiichiro HATTORI; Takeshi WATANABE - Web page: https://patentgrep.com/patent/US20210280480A1 ## CPC - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 70/69: Insulating materials thereof - H10W 70/468: {Circuit boards} - H10W 72/00: Interconnections or connectors in packages - H10W 74/10: characterised by their shape or disposition - H10W 90/00: Package configurations - H10W 70/635: {Through-vias} - H10W 72/073: {of die-attach connectors} - H10W 72/075: {of bond wires} - H10W 72/354: {comprising polymers} - H10W 72/551: {Materials of bond wires} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/231: {the stacked chips being on both top and bottom sides of an auxiliary carrier having no electrical connection structure} - H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape - H10W 90/732: {between stacked chips} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/752: {between stacked chips} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device of an embodiment includes: a wiring board; a semiconductor chip mounted on the wiring board; and a resin-containing layer bonded on the wiring board so as to fix the semiconductor chip to the wiring board. The resin-containing layer contains a resin-containing material having a breaking strength of 15 MPa or more at 125° C. ## Claims ### Claim 1 A semiconductor device comprising: a wiring board; a semiconductor chip mounted on the wiring board; and a resin-containing layer bonded on the wiring board so as to fix the semiconductor chip to the wiring board, wherein the resin-containing layer contains a resin-containing material having a breaking strength of 15 MPa or more at 125° C. ### Claim 2 (depends on 1) The device according to claim 1, wherein a linear expansion coefficient of the resin-containing material is 70 ppm or less. ### Claim 3 (depends on 1) The device according to claim 1, wherein an adhesive strength of the resin-containing material to composing materials of the wiring board is 10 MPa or more. ### Claim 4 (depends on 1) The device according to claim 1, wherein a thickness of the resin-containing layer is not less than 40 μM nor more than 150 μm. ### Claim 5 (depends on 1) The device according to claim 1, wherein the semiconductor chip is embedded in the resin-containing layer bonded to the wiring board. ### Claim 6 (depends on 1) The device according to claim 1, wherein the resin-containing layer is interposed between the wiring board and the semiconductor chip so as to bond the semiconductor chip with the wiring board. ### Claim 7 (depends on 1) The device according to claim 1, wherein the resin-containing material is a cured product of a resin composition containing an epoxy resin, a phenolic resin, acrylic rubber, and an inorganic filler. ### Claim 8 (depends on 7) The device according to claim 7, wherein an epoxy equivalent of the epoxy resin is not less than 150 g/eq nor more than 2000 g/eq, and a hydroxyl equivalent of the phenolic resin is not less than 90 g/eq nor more than 220 g/eq, and a ratio of the epoxy equivalent of the epoxy resin to the hydroxyl equivalent of the phenolic resin is not less than 0.8 nor more than 1.2. ### Claim 9 (depends on 7) The device according to claim 7, wherein a weight-average molecular weight of the acrylic rubber is not less than 500000 nor more than 1000000, and a compounding ratio of the acrylic rubber in the resin composition is not less than 1 mass % nor more than 20 mass %. ### Claim 10 A semiconductor device comprising: a wiring board; a first semiconductor chip mounted on the wiring board; a resin-containing layer provided on the wiring board so that the first semiconductor chip is embedded therein; and a plurality of second semiconductor chips stacked and mounted above the first semiconductor chip, wherein the resin-containing layer contains a resin-containing material having a breaking strength of 15 MPa or more at 125° C. ### Claim 11 (depends on 10) The device according to claim 10, further comprising a spacer chip interposed between the resin-containing layer and the plurality of second semiconductor chips. ### Claim 12 (depends on 10) The device according to claim 10, wherein a ratio of a thickness of a stack containing the plurality of second semiconductor chips in a stack direction to a whole thickness of the device is 67% or more. ### Claim 13 (depends on 10) The device according to claim 10, wherein a linear expansion coefficient of the resin-containing material is 70 ppm or less. ### Claim 14 (depends on 10) The device according to claim 10, wherein an adhesive strength of the resin-containing material to composing materials of the wiring board is 10 MPa or more. ### Claim 15 (depends on 10) The device according to claim 10, wherein a thickness of the resin-containing layer is not less than 40 μm nor more than 150 μm. ### Claim 16 A semiconductor device comprising: a wiring board; a plurality of semiconductor chips mounted on the wiring board; adhesion layers bonded between the wiring board and a first chip on a lower side in the plurality of semiconductor chips and between the first chip and a second chip on a upper side in the plurality of semiconductor chips, wherein an adhesive layer bonding the wiring board and the first chip contains a resin-containing material having a breaking strength of 15 MPa or more at 125° C. ### Claim 17 (depends on 16) The device according to claim 16, wherein a ratio of a thickness of a stack containing the plurality of semiconductor chips in a stack direction to a whole thickness of the device is 67% or more. ### Claim 18 (depends on 16) The device according to claim 16, wherein a linear expansion coefficient of the resin-containing material is 70 ppm or less. ### Claim 19 (depends on 16) The device according to claim 16, wherein an adhesive strength of the resin-containing material to composing materials of the wiring board is 10 MPa or more. ### Claim 20 (depends on 16) The device according to claim 16, wherein a thickness of the adhesive layer is not less than 40 μm nor more than 150 μm.