# US 2021/0280468 A1 · Semiconductor structure

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2021/0280468 A1
- Document ID: US20210280468A1
- Status: Published application
- Kind: A1
- Application number: 17/330,272
- Filed: 2021-05-25
- Published: 2021-09-09
- Earliest claimed: 2018-11-28
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: I-MING CHANG; CHUNG-LIANG CHENG; HSIANG-PI CHANG; HUNG-CHANG SUN; YAO-SHENG HUANG; YU-WEI LU; FANG-WEI LEE; ZIWEI FANG; HUANG-LIN CHAO
- Web page: https://patentgrep.com/patent/US20210280468A1

## CPC

- H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/502: {characterised by the stacked channels}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/6735: {having gates fully surrounding the channels, e.g. gate-all-around}
- H10D 30/751: {having composition variations in the channel regions}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 84/013: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0135: {Manufacturing their gate conductors}
- H10D 84/0144: {Manufacturing their gate insulating layers}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/0167: {Manufacturing their channels}
- H10D 84/0181: {Manufacturing their gate insulating layers}
- H10D 84/8311: {the IGFETs characterised by having different channel structures}
- H10D 84/8314: {the IGFETs characterised by having gate insulating layers with different properties}
- H10D 84/834: {comprising FinFETs}
- H10D 84/851: {comprising IGFETs having stacked nanowire, nanosheet or nanoribbon channels}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10W 20/075: {of multilayered thin functional dielectric layers}
- H10D 30/0193: {by modifying properties of the stacked channels}
- H10D 84/0177: {the gate conductors having different materials or different implants}
- H10D 84/83135: {the IGFETs characterised by having different gate conductor materials or different gate conductor implants}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

## Claims

### Claim 1

A semiconductor structure comprising:
a substrate comprising a first region and a second region;
a first channel layer disposed in the first region and a second channel layer disposed in the second region, wherein the first channel layer comprises germanium (Ge) compound of a first Ge concentration and the second channel layer comprises Ge compound of a second Ge concentration;
a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer; and
a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer,
wherein the first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, wherein a thickness of the first dielectric layer is greater than a thickness of the second dielectric layer.

### Claim 3 (depends on 1)

The semiconductor structure of claim 1, wherein the first gate electrode and the second electrode comprise metal material.

### Claim 4 (depends on 1)

The semiconductor structure of claim 1, further comprising:
a first high-k dielectric layer between the first gate electrode and the first dielectric layer; and
a second high-k dielectric layer between the second gate electrode and the second dielectric layer.

### Claim 5 (depends on 4)

The semiconductor structure of claim 4, wherein a thickness of the first high-k dielectric layer and a thickness of the second high-k dielectric layer are similar.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, wherein the first channel layer is formed in a first fin structure, and the second channel layer is formed in a second fin structure.

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, further comprising:
a first source/drain disposed at two sides of the first gate electrode; and
a second source/drain disposed at two sides of the second gate electrode.

### Claim 8

A semiconductor structure comprising:
a fin structure comprising:
an outer portion comprising a semiconductor material; and
an inner portion inside the outer portion and comprising the semiconductor material;
a high-k dielectric layer over the fin structure;
a dielectric layer between the high-k dielectric layer and the fin structure; and
a metal gate electrode over the high-k dielectric layer,
wherein a concentration of the semiconductor material in the outer portion is less than a concentration of the semiconductor material in the inner portion.

### Claim 9 (depends on 8)

The semiconductor structure of claim 8, wherein the concentration of the semiconductor material in the outer portion is less than approximately 25%.

### Claim 10 (depends on 8)

The semiconductor structure of claim 8, wherein the concentration of the semiconductor material in the inner portion is greater than approximately 30%.

### Claim 11 (depends on 8)

The semiconductor structure of claim 8, wherein the dielectric layer comprises the semiconductor material.

### Claim 12 (depends on 11)

The semiconductor structure of claim 11, wherein a concentration of the semiconductor material in the dielectric layer is less than approximately 3%.

### Claim 13 (depends on 8)

The semiconductor structure of claim 8, wherein the semiconductor material comprises germanium.

### Claim 14

A semiconductor structure comprising:
a first fin structure and a second fin structure, wherein the first fin structure comprises a first semiconductor material, and the second fin structure comprises the first semiconductor material and a second semiconductor material;
a high-k dielectric layer over the first fin structure and the second fin structure;
a first dielectric layer between the high-k dielectric layer and first fin structure, and a second dielectric layer between the high-k dielectric layer and the second fin structure; and
a first metal gate electrode over the high-k dielectric layer and a second metal gate electrode over the high-k dielectric layer,
wherein the second fin structure further comprises an outer portion and an inner portion inside the outer portion, and a concentration of the second semiconductor material in the outer portion is less than a concentration of the second semiconductor material in the inner portion.

### Claim 15 (depends on 14)

The semiconductor structure of claim 14, wherein a lattice constant of the first semiconductor material is different from a lattice constant of the second semiconductor material.

### Claim 16 (depends on 14)

The semiconductor structure of claim 14, wherein the concentration of the second semiconductor material in the outer portion is less than approximately 25%.

### Claim 17 (depends on 14)

The semiconductor structure of claim 14, wherein the concentration of the second semiconductor material in the inner portion is greater than approximately 30%.

### Claim 18 (depends on 14)

The semiconductor structure of claim 14, wherein the second dielectric layer comprises the second semiconductor material.

### Claim 19 (depends on 18)

The semiconductor structure of claim 18, wherein a concentration of the second semiconductor material in the second dielectric layer is less than approximately 3%.

### Claim 20 (depends on 14)

The semiconductor structure of claim 14, wherein a thickness of the first dielectric layer and a thickness of the second dielectric layer are similar.