# US 2021/0280458 A1 · Semiconductor device and formation method thereof

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- Number: US 2021/0280458 A1
- Document ID: US20210280458A1
- Status: Published application
- Kind: A1
- Application number: 17/249,540
- Filed: 2021-03-04
- Published: 2021-09-09
- Earliest claimed: 2020-03-05
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Inventors: Jisong JIN; Abraham YOO
- Web page: https://patentgrep.com/patent/US20210280458A1

## CPC

- H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning}
- H10P 50/73: {using masks for insulating materials}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The method includes providing a to-be-etched layer including an first region and a second region adjoining the first region, forming a first mask layer on the to-be-etched layer, forming a patterned core layer on the first mask layer of the first region, forming a sidewall spacer on the core layer and the first mask layer, forming a first sacrificial layer on the sidewall spacer on the surface of the first mask layer of the second region, forming a second sacrificial layer on the sidewall spacer, removing the first sacrificial layer, the sidewall spacer on the surface of the first mask layer of the second region, and the sidewall spacer on a top of the core layer, removing the core layer, etching the first mask layer of the first region to form a first trench, and etching the first mask layer of the second region to form a second trench.

## Claims

### Claim 1

A method for forming a semiconductor device, comprising:
providing a to-be-etched layer including a first region and a second region adjoining the first region;
forming a first mask layer on the to-be-etched layer;
forming a patterned core layer on the first mask layer of the first region;
forming a sidewall spacer on a top surface and a sidewall surface of the core layer and a surface of the first mask layer;
forming a first sacrificial layer on the sidewall spacer on the surface of the first mask layer of the second region;
forming a second sacrificial layer on the sidewall spacer, the second sacrificial layer exposing the sidewall spacer on the top of the core layer and a top of the first sacrificial layer;
removing the first sacrificial layer, the sidewall spacer on the surface of the first mask layer of the second region and the sidewall spacer on the top of the core layer;
removing the core layer;
etching the first mask layer of the first region to form a first trench; and
etching the first mask layer of the second region to form a second trench.

### Claim 2 (depends on 1)

The method according to claim 1, wherein forming the first sacrificial layer includes:
forming a first sacrificial material layer on a surface of the sidewall spacer;
forming a patterned photoresist layer on the first sacrificial material layer, the patterned photoresist layer covering the first sacrificial material layer of the second region; and
using the patterned photoresist layer as a mask to etch the first sacrificial material layer to form the first sacrificial layer on the sidewall spacer on the surface of the first mask layer of the second region.

### Claim 3 (depends on 1)

The method according to claim 1, wherein forming the second sacrificial layer includes:
forming a second sacrificial material layer on a surface of the sidewall spacer and a surface of the first sacrificial layer; and
etching back the second sacrificial material layer until exposing the sidewall spacer on the top of the core layer and a top of the first sacrificial layer to form the second sacrificial layer.

### Claim 4 (depends on 2)

The method according to claim 2, wherein a material of the first sacrificial layer includes spin-coated carbon, spin-coated glass, spin-coated organic, or spin-coated metal oxide.

### Claim 5 (depends on 4)

The method according to claim 4, wherein removing the first sacrificial layer includes at least one of a dry etching or a wet etching.

### Claim 6 (depends on 3)

The method according to claim 3, wherein a material of the second sacrificial layer includes spin-coated carbon, spin-coated glass, spin-coated organic, or spin-coated metal oxide.

### Claim 7 (depends on 6)

The method according to claim 6, wherein etching back the second sacrificial layer includes at least one of a dry etching or a wet etching.

### Claim 8 (depends on 1)

The method according to claim 1, wherein a material of the sidewall spacer includes silicon oxide (SiO2), silicon nitride (SiN), titanium oxide (TiO2), titanium nitride (TiN), aluminum nitride (AlN), or aluminum oxide (Al2O3).

### Claim 9 (depends on 1)

The method according to claim 1, after forming the first trench and the second trench, further comprising: removing the second sacrificial layer and the sidewall spacer on the sidewall surface of the core layer.

### Claim 10 (depends on 9)

The method according to claim 9, further comprising:
etching the to-be-etched layer at bottom of the first trench to form a first target trench in the to-be-etched layer of the first region; and
etching the to-be-etched layer at bottom of the second trench to form a second target trench in the to-be-etched layer of the second region.

### Claim 11 (depends on 10)

The method according to claim 10, further comprising:
forming a first conductive layer in the first target trench; and
forming a second conductive layer in the second target trench.