# US 2021/0278869 A1 · Linear transimpedance amplifier dual regulator architecture and tuning

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- Number: US 2021/0278869 A1
- Document ID: US20210278869A1
- Status: Published application
- Kind: A1
- Application number: 16/808,926
- Filed: 2020-03-04
- Published: 2021-09-09
- Earliest claimed: 2020-03-04
- Assignees: Cisco Technology, Inc.
- Applicants: Cisco Technology, Inc.
- Inventors: Alexander Kurylak; Bibhu Prasad Das; Kadaba Lakshmikumar
- Web page: https://patentgrep.com/patent/US20210278869A1

## CPC

- G05F 1/575: characterised by the feedback circuit
- H03F 3/08: controlled by light
- H03F 1/0211: {with control of the supply voltage or current}
- H03F 1/08: Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements (wide-band amplifiers with inter-stage coupling networks incorporating these impedances H03F1/42)
- H03F 3/50: Amplifiers in which input is applied to, or output is derived from, an impedance common to input and output circuits of the amplifying element, e.g. cathode follower
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H03F: AMPLIFIERS

## Abstract

A system includes a transimpedance amplifier, disposed on a chip, having a front-end section and a back-end section; an on-chip linear regulator, on the chip, arranged to power the front-end section; and an off-chip switching regulator, off the chip, arranged to power the back-end section. The arrangement provides low noise power supply for the front-end section, while providing a more power efficient switching regulator to power the back-end section. The output voltage of the on-chip linear regulator and the output voltage of the off-chip switching regulator are controlled to be the same.

## Claims

### Claim 1

A system, comprising:
a transimpedance amplifier disposed on a chip, the transimpedance amplifier having a front-end section and a back-end section;
an on-chip linear regulator, on the chip, arranged to power the front-end section; and
an off-chip switching regulator, off the chip, arranged to power the back-end section.

### Claim 2 (depends on 1)

The system of claim 1, wherein the front-end section comprises a transimpedance front-end, a single to differential converter and a first feedback circuit.

### Claim 3 (depends on 1)

The system of claim 1, wherein the back-end section comprises a programmable gain amplifier section, an output buffer, and a second feedback circuit.

### Claim 4 (depends on 1)

The system of claim 1, further comprising a voltage measurement and feedback block, in communication with the off-chip switching regulator, that is configured to monitor an output voltage of the on-chip linear regulator, monitor an output voltage of the off-chip switching regulator, and cause the output voltage of the off-chip switching regulator to be tuned to the output voltage of the on-chip linear regulator.

### Claim 5 (depends on 4)

The system of claim 4, further comprising a process and temperature monitor circuit arranged to monitor an output of the on-chip linear regulator.

### Claim 6 (depends on 1)

The system of claim 1, further comprising a first process and temperature monitor circuit arranged to monitor an output of the on-chip linear regulator, and a second process and temperature monitor circuit arranged to monitor an output voltage of the off-chip switching regulator.

### Claim 7 (depends on 6)

The system of claim 6, further comprising a frequency comparator and a multiplexer in communication with the frequency comparator, and wherein an output of the first process and temperature monitor circuit and an output of the second process and temperature monitor circuit are selectively supplied to the frequency comparator via the multiplexer.

### Claim 8 (depends on 7)

The system of claim 7, wherein the frequency comparator is in communication with the on-chip linear regulator and the off-chip switching regulator via a demultiplexer, and an output of the frequency comparator is selectively supplied to the on-chip linear regulator and the off-chip switching regulator via the demultiplexer.

### Claim 9 (depends on 1)

The system of claim 1, further comprising a process and temperature monitor circuit configured to independently monitor an output of the on-chip linear regulator and the off-chip switching regulator.

### Claim 10 (depends on 9)

The system of claim 9, wherein the process and temperature monitor circuit comprises a first switch in communication with the output of the on-chip linear regulator, and a second switch in communication with the output of the off-chip switching regulator.

### Claim 11 (depends on 9)

The system of claim 9, further comprising a frequency comparator, and wherein an output of the process and temperature monitor circuit is supplied to the frequency comparator.

### Claim 12 (depends on 11)

The system of claim 11, wherein the frequency comparator is in communication with the on-chip linear regulator and the off-chip switching regulator via a demultiplexer, and an output of the frequency comparator is selectively supplied to the on-chip linear regulator and the off-chip switching regulator via a second demultiplexer.

### Claim 13

A device comprising:
a transimpedance amplifier disposed on a chip, the transimpedance amplifier having a front-end section and a back-end section;
an on-chip linear regulator, on the chip, arranged to power the front-end section; and
a process and temperature monitor circuit configured to independently monitor an output of the on-chip linear regulator and an off-chip switching regulator that powers the back-end section.

### Claim 14 (depends on 13)

The device of claim 13, wherein the process and temperature monitor circuit comprises a first switch in communication with the output of the on-chip linear regulator, and a second switch in communication with the output of the off-chip switching regulator.

### Claim 15 (depends on 13)

The device of claim 13, further comprising a frequency comparator, and wherein an output of the process and temperature monitor circuit is supplied to the frequency comparator.

### Claim 16 (depends on 15)

The device of claim 15, wherein the frequency comparator is in communication with the on-chip linear regulator and the off-chip switching regulator via a demultiplexer, and an output of the frequency comparator is selectively supplied to the on-chip linear regulator and the off-chip switching regulator via the demultiplexer.

### Claim 17

A method comprising:
receiving power at a front-end section of a transimpedance amplifier, disposed on a chip, from an on-chip linear regulator disposed on the chip;
receiving power at a back-end section of the transimpedance amplifier, from an off-chip switching regulator;
monitoring an output voltage of the on-chip linear regulator and an output voltage of the off-chip switching regulator; and
causing the output voltage of the off-chip switching regulator to be identical to the output voltage of the on-chip linear regulator.

### Claim 18 (depends on 17)

The method of claim 17, wherein the front-end section comprises a transimpedance front-end, a single to differential converter and a first feedback circuit.

### Claim 19 (depends on 17)

The method of claim 17, wherein the back-end section comprises a programmable gain amplifier section, an output buffer, and a second feedback circuit.

### Claim 20 (depends on 17)

The method of claim 17, further comprising monitoring the output voltage of the on-chip linear regulator and the output voltage of the off-chip switching regulator using a single process and temperature monitoring circuit.
