# US 2021/0278715 A1 · Display device

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- Number: US 2021/0278715 A1
- Document ID: US20210278715A1
- Status: Published application
- Kind: A1
- Application number: 17/326,675
- Filed: 2021-05-21
- Published: 2021-09-09
- Earliest claimed: 2015-02-12
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Hiroyuki MIYAKE; Makoto KANEYASU
- Web page: https://patentgrep.com/patent/US20210278715A1

## CPC

- G02F 1/1343: Electrodes {(reflective electrodes G02F1/133553)}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- G09F 9/30: in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00)
- G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- G02F 1/133602: {Direct backlight}
- G02F 1/13606: {having means for reducing parasitic capacitance}
- G09G 2300/0439: Pixel structures
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G09F: DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.

## Claims

### Claim 1

A display device comprising:
a pixel, the pixel comprising:
a first transistor;
a second transistor;
a first pixel electrode electrically connected to the first transistor;
a second pixel electrode electrically connected to the second transistor;
a first capacitor; and
a second capacitor;
a scan line provided over and in contact with a substrate, the scan line having a region that functions as a gate electrode of the first transistor and a region that functions as a gate electrode of the second transistor;
a first conductive layer provided over and in contact with the substrate, the first conductive layer having a region functioning as one electrode of the first capacitor;
a first insulating film having a region in contact with a top surface of the scan line and a region in contact with a top surface of the first conductive layer;
a semiconductor film provided over the scan line with the first insulating film provided therebetween, the semiconductor film comprising a channel formation region of the first transistor and a channel formation region of the second transistor;
a signal line having a region functioning as one of a source electrode and a drain electrode of the first transistor and a region functioning as one of a source electrode and a drain electrode of the second transistor;
a second conductive layer having a region functioning as the other of the source electrode and the drain electrode of the first transistor and a region functioning as the other electrode of the first capacitor; and
a third conductive layer having a region overlapping with the scan line and electrically connected to the first conductive layer,
wherein the second conductive layer is electrically connected to the first pixel electrode in a region overlapping the first conductive layer,
wherein the signal line has a region extending in a first direction, and
wherein the third conductive layer has a region extending in the first direction.

### Claim 2

A display device comprising:
a pixel, the pixel comprising:
a first transistor;
a second transistor;
a first pixel electrode electrically connected to the first transistor;
a second pixel electrode electrically connected to the second transistor;
a first capacitor; and
a second capacitor;
a scan line provided over and in contact with a substrate, the scan line having a region that functions as a gate electrode of the first transistor and a region that functions as a gate electrode of the second transistor;
a first conductive layer provided over and in contact with the substrate, the first conductive layer having a region functioning as one electrode of the first capacitor;
a first insulating film having a region in contact with a top surface of the scan line and a region in contact with a top surface of the first conductive layer;
a semiconductor film provided over the scan line with the first insulating film provided therebetween, the semiconductor film comprising a channel formation region of the first transistor and a channel formation region of the second transistor;
a signal line having a region functioning as one of a source electrode and a drain electrode of the first transistor and a region functioning as one of a source electrode and a drain electrode of the second transistor;
a second conductive layer having a region functioning as the other of the source electrode and the drain electrode of the first transistor and a region functioning as the other electrode of the first capacitor; and
a third conductive layer having a region overlapping with the scan line and electrically connected to the first conductive layer,
wherein the second conductive layer is electrically connected to the first pixel electrode in a region overlapping the first conductive layer,
wherein the signal line has a region extending in a first direction,
wherein the third conductive layer has a region extending in the first direction, and
wherein the second conductive layer and the signal line each have no region of overlap with the third conductive layer.

### Claim 3

A display device comprising:
a pixel, the pixel comprising:
a first transistor;
a second transistor;
a first pixel electrode electrically connected to the first transistor;
a second pixel electrode electrically connected to the second transistor;
a first capacitor; and
a second capacitor;
a scan line provided over and in contact with a substrate, the scan line having a region that functions as a gate electrode of the first transistor and a region that functions as a gate electrode of the second transistor;
a first conductive layer provided over and in contact with the substrate, the first conductive layer having a region functioning as one electrode of the first capacitor;
a first insulating film having a region in contact with a top surface of the scan line and a region in contact with a top surface of the first conductive layer;
a semiconductor film provided over the scan line with the first insulating film provided therebetween, the semiconductor film comprising a channel formation region of the first transistor and a channel formation region of the second transistor;
a signal line having a region functioning as one of a source electrode and a drain electrode of the first transistor and a region functioning as one of a source electrode and a drain electrode of the second transistor;
a second conductive layer having a region functioning as the other of the source electrode and the drain electrode of the first transistor and a region functioning as the other electrode of the first capacitor; and
a third conductive layer having a region intersecting with the scan line and electrically connected to the first conductive layer,
wherein the second conductive layer is electrically connected to the first pixel electrode in a region overlapping the first conductive layer,
wherein the signal line has a region extending in a first direction, and
wherein the third conductive layer has a region extending in the first direction.

### Claim 4 (depends on 2)

The display device according to claim 2, wherein the third conductive layer has a region intersecting with the scan line.