# US 2021/0275064 A1 · System, methods and apparatuses for in situ electrochemical imaging

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- Number: US 2021/0275064 A1
- Document ID: US20210275064A1
- Status: Published application
- Kind: A1
- Application number: 17/249,137
- Filed: 2021-02-22
- Published: 2021-09-09
- Earliest claimed: 2015-06-09
- Assignees: The Governing Council of the University of Toronto
- Applicants: The Governing Council of the University of Toronto
- Inventors: Nima SOLTANI; Roman GENOV
- Web page: https://patentgrep.com/patent/US20210275064A1

## CPC

- A61B 5/1473: invasive, e.g. introduced into the body by a catheter
- A61B 5/002: {Monitoring the patient using a local or closed circuit, e.g. in a room or building (A61B5/0017 takes precedence)}
- A61B 5/0536: Impedance imaging, e.g. by tomography
- A61B 5/1477: non-invasive
- A61B 5/6868: {Brain}
- A61B 5/7225: {Details of analogue processing, e.g. isolation amplifier, gain or sensitivity adjustment, filtering, baseline or drift compensation (input circuits for detecting, measuring, or recording bioelectric or biomagnetic signals A61B5/30; specific diagnostic methods using bioelectric or biomagnetic signals A61B5/316)}
- H03M 3/464: {Details of the digital/analogue conversion in the feedback path}
- A61B 5/0022: {Monitoring a patient using a global network, e.g. telephone networks, internet}
- A61B 5/14532: {for measuring glucose, e.g. by tissue impedance measurement}
- A61B 5/14546: {for measuring analytes not otherwise provided for, e.g. ions, cytochromes}
- A61B 5/4094: {Diagnosing or monitoring seizure diseases, e.g. epilepsy}
- A61B 2560/0219: of externally powered implanted units
- H03M 3/43: {the quantiser being a single bit one}
- H03M 3/462: {Details relating to the decimation process (decimation filters in general H03H17/0416, H03H17/0621)}
- A61B: DIAGNOSIS; SURGERY; IDENTIFICATION (usefulness limited to only animals A61D)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

Systems, methods and apparatuses described herein generally provide a millimetre size package-free complementary metal-oxide-semiconductor (“CMOS”) chip (referred to as a “die”) for the in situ (on-site) measurement or imaging of electrochemically detectable analytes.

## Claims

### Claim 1

A potentiostat circuit comprising:
a. an op-amp-less integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;
b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;
c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and
d. a pulse shaping block providing an output signal of the potentiostat.

### Claim 2 (depends on 7)

The potentiostat circuit of claim 7, wherein the comparator is a zero-hysteresis comparator circuit.

### Claim 3 (depends on 8)

The potentiostat circuit of claim 8, wherein the comparator circuit reduces naturally occurring hysteresis in the comparator by isolating the output of the comparator from its input.

### Claim 4 (depends on 7)

The potentiostat circuit of claim 7, wherein the op-amp-less delta-sigma ADS is coupled to the recording module array without the need for an intermediary transimpedance amplifier.

### Claim 5

A integrated circuit for electrochemically measuring target analytes of a subject comprising:
a. a power coil for receiving power from a receiver device by magnetic induction;
b. a microelectrode array and an associated amperometric channel array for measuring the target analytes of the subject and generating sensor readings; and
c. a transmitter for wirelessly transmitting sensor readings to the receiver device.

### Claim 6 (depends on 11)

The integrated circuit of claim 11, wherein the amperometric channel array comprises an op-amp-less delta-sigma-ADC-based potentiostat and a 1 bit multiplication circuit comprising an XOR gate and a counter.

### Claim 7 (depends on 12)

The integrated circuit of claim 12, wherein the op-amp-less delta-sigma-ADC-based potentiostat comprises:
a. an op-amp less integrator circuit coupled to the microelectrode array, the integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;
b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;
c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and
d. a pulse shaping block providing an output signal of the potentiostat.

### Claim 8

A method for in situ electrochemical imaging of target analytes of a subject comprising:
a. implanting an integrated circuit on, in or adjacent to a targeted region of the subject, the integrated circuit comprising:
i. a power coil for receiving power from a receiver device by magnetic induction;
ii. a microelectrode array and an associated amperometric channel array for measuring the target analytes of the subject and generating sensor readings; and
iii. a transmitter for transmitting sensor readings to the receiver device;
b. positioning the receiver device on a surface of the subject;
c. receiving sensor readings at the receiver device; and
d. processing the sensor readings to diagnose risk of seizure onset in the subject.

### Claim 9 (depends on 14)

The method of claim 14, wherein the targeted region is the cortex.

### Claim 10 (depends on 15)

The method of claim 15, wherein the surface is the scalp.

### Claim 11 (depends on 14)

The method of claim 14, wherein the amperometric channel array comprises an op-amp-less delta-sigma-ADC-based potentiostat and a 1 bit multiplication circuit comprising an XOR gate and a counter.

### Claim 12 (depends on 17)

The method of claim 17, wherein the op-amp-less delta-sigma-ADC-based potentiostat comprises:
a. an op-amp less integrator circuit coupled to the microelectrode array, the integrator circuit comprising a grounded capacitor for integration of the recorded analog signal;
b. a comparator coupled to an output of the integrator circuit to reduce signal distortion thereof;
c. a digital-to-analog converter providing a negative feedback loop from an output of the comparator to the output of the integrator circuit; and
d. a pulse shaping block providing an output signal of the potentiostat