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US 2021/0265481 A1Published application
Semiconductor Devices with Improved Capacitors
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWang-Chun Huang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
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Abstract
A semiconductor device includes a substrate, two source/drain (S/D) regions over the substrate, a channel region between the two S/D regions and including a semiconductor material, a deposited capacitor material (DCM) layer over the channel region a dielectric layer over the DCM layer and a metallic gate electrode layer over the dielectric layer.
Claims21
A semiconductor device, comprising:
- a substrate;
- two source/drain (S/D) regions over the substrate;
- a channel region between the two S/D regions and including a semiconductor material;
- a deposited capacitor material (DCM) layer over the channel region;
- a dielectric layer over the DCM layer;
- and
- a metallic gate electrode layer over the dielectric layer.
4 more elements
A semiconductor device, comprising:
- a substrate;
- a first device over a first region of the substrate, wherein the first device includes two first source/drain (S/D) regions, a first channel region of a semiconductor material between the two first S/D regions, a first dielectric layer directly on the first channel region, and a first gate electrode layer over the first dielectric layer;
- and
- a second device over a second region of the substrate, wherein the second device includes two second S/D regions, a second channel region of the semiconductor material between the two second S/D regions, a deposited capacitor material (DCM) layer directly on the second channel region, a second dielectric layer directly on the DCM layer, and a second gate electrode layer over the second dielectric layer.
1 more element
15-20. (canceled)
A semiconductor device, comprising:
- a substrate;
- a first device over a first region of the substrate, wherein the first device includes two first source/drain (S/D) regions, multiple first channel layers between the two first S/D regions and suspended over the substrate, a first dielectric layer over the first channel layers, and a first gate electrode layer over the first dielectric layer;
- and
- a second device over a second region of the substrate, wherein the second device includes two second S/D regions, multiple second channel layers between the two second S/D regions and suspended over the substrate, a deposited capacitor material (DCM) layer directly on the second channel layers, a second dielectric layer over the DCM layer, and a second gate electrode layer over the second dielectric layer.
1 more element
Dependencies are inferred from the claim text.