Display panel

A display panel comprising:

• a substrate;
• a first thin film transistor arranged on the substrate and including a first semiconductor layer and a first gate electrode;
• a data line arranged on the substrate and extending in a first direction;
• a scan line arranged on the substrate and extending in a second direction intersecting the first direction;
• a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode;
• a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer;
• a node connection line electrically connecting the first thin film transistor and the third thin film transistor;
• and
• a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor,
• wherein the first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.