Structure of semiconductor device and method for fabricating the same

A structure of semiconductor device, comprising:

• a substrate, configured to have a cell region and a high-voltage region;
• a memory cell, on the substrate within the cell region, the memory cell including:
• a memory gate structure on the substrate;
• a selection gate structure on the substrate;
• and
• a first spacer, sandwiched between or respectively on sidewalls of the memory cell structure and the selection gate structure;
• and
• a first high-voltage transistor, on the substrate within the high-voltage region, a first composite gate structure of the first high-voltage transistor including:
• a first gate structure on the substrate;
• an insulating layer with a predetermined thickness on the substrate in -like structure or an L-like structure at cross-section;
• and
• a second gate structure on the insulating layer along the -like structure or the L-like structure,
• wherein the selection gate structure and the second gate structure are originated from a same preliminary conductive layer.

A method for fabricating semiconductor device, comprising:

• providing a substrate, configured to have a cell region and a high-voltage region;
• forming a memory cell on the substrate within the cell region, the memory cell including:
• a memory gate structure on the substrate;
• a selection gate structure on the substrate;
• and
• a first spacer, sandwiched between or respectively on sidewalls of the memory cell structure and the selection gate structure;
• and
• forming a first high-voltage transistor, on the substrate within the high-voltage region, wherein a first composite gate structure of the first high-voltage transistor as formed includes:
• a first gate structure on the substrate;
• an insulating layer with a predetermined thickness on the substrate in -like structure or an L-like structure at cross-section,
• a second gate structure on the insulating layer along the -like structure or the L-like structure;
• wherein the insulating layer and the first spacer are formed from a same preliminary dielectric layer or from different preliminary dielectric layers,
• wherein the selection gate structure and the second gate structure are originated from a same preliminary conductive layer.