Semiconductor device having vertical fence structures
AssigneeSamsung Electronics Co., Ltd.
InventorsShinjae KANG, Woosung LEE, Jeonggil LEE, Hanmei CHOI, Hauk HAN
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Abstract
Semiconductor devices including a substrate including a cell array region and a through electrode region, an electrode stack on the substrate and including electrodes, vertical structures penetrating the electrode stack within the cell array region, vertical fence structures within an extension region and surrounding the through electrode region, and insulating layers being inside a perimeter defined by the vertical fence structures and being at the same level as the electrodes may be provided. The electrodes may include first protrusions protruding between the vertical fence structures in a plan view.
Claims21
A semiconductor device comprising:
- a substrate including a cell array region and an extension region, the extension region extending from the cell array region and including a through electrode region;
- an electrode stack on the substrate, the electrode stack including mold layers and electrodes alternately stacked;
- vertical structures penetrating the electrode stack within the cell array region;
- and
- vertical fence structures within the extension region and penetrating the electrode stack, the vertical fence structures surrounding the through electrode region in a plan view,
- wherein a distance between adjacent ones of the vertical fence structures is less than a distance between adjacent ones of the vertical structures.
A semiconductor device comprising:
- a substrate including a cell array region and an extension region, the extension region extending from the cell array region and including a through electrode region, the through electrode region including through electrodes;
- an electrode stack on the substrate, the electrode stack including mold layers and electrodes alternately stacked;
- vertical structures penetrating the electrode stack within the cell array region;
- and
- inner vertical fence structures and outer vertical fence structures within the extension region and penetrating the electrode stack, the inner vertical fence structures and the outer vertical fence structures surrounding the through electrode region in a plan view,
- wherein a distance between each of the inner vertical fence structures and a corresponding one of the outer vertical fence structures is less than a distance between each of the inner vertical fence structures and a corresponding one of the through electrodes, and
- wherein the distance between each of the inner vertical fence structures and a corresponding one of the outer vertical fence structures is less than a distance between adjacent ones of the vertical structures.
A semiconductor device comprising:
- a substrate including a cell array region and an extension region, the extension region extending from the cell array region and including a through electrode region;
- an electrode stack on the substrate, the electrode stack including mold layers and electrodes alternately stacked;
- a peripheral circuit structure between the substrate and the electrode stack;
- a lower conductive layer on the peripheral circuit structure;
- a connection conductive layer on the lower conductive layer within the cell array region;
- a connection mold layer on the lower conductive layer within the extension region;
- a supporter on the connection conductive layer and the connection mold layer, the supporter having the electrode stack thereon;
- a buried insulating layer in the through electrode region while penetrating the lower conductive layer, the connection mold layer, and the supporter;
- vertical structures penetrating the electrode stack within the cell array region;
- vertical fence structures in the extension region while penetrating the electrode stack, the vertical fence structures surrounding the through electrode region in a plan view;
- and
- insulating layers being inside a perimeter defined by the vertical fence structures, and the insulating layers being at same levels as corresponding ones of the electrodes, respectively,
- wherein the electrodes include first protrusions configured to be in contact with the vertical fence structures in the plan view.
21-27. (canceled)
Dependencies are inferred from the claim text.