Integrated Circuitry, DRAM Circuitry, Method Used In Forming Integrated Circuitry, And Method Used In Forming Memory Circuitry

A method used in forming memory circuitry, comprising:

• forming transistors individually comprising:
• a pair of source/drain regions;
• a channel region between the pair of source/drain regions;
• and
• a conductive gate operatively proximate the channel region;
• forming digitline structures that are individually directly electrically coupled to one of the source/drain regions of multiple of the transistors;
• forming conductive vias laterally between and spaced longitudinally along the digitline structures, individual of the conductive vias being directly electrically coupled to one of the other source/drain regions of the multiple transistors, the conductive vias comprising uppermost conductive material of a redistribution layer, the uppermost conductive material being above the digitline structures;
• forming first insulating material laterally between the uppermost conductive material of immediately-adjacent of the conductive vias;
• forming second insulating material directly above the first insulating material and directly above the uppermost conductive material of the conductive vias;
• the second insulating material comprising silicon, carbon, nitrogen, and hydrogen;
• forming a third material directly above the second insulating material, the third material and the second insulating material comprising different compositions relative one another;
• annealing the second insulating material to cause hydrogen therein to move downwardly through the conductive vias and into the other source/drain regions of the multiple transistors, the third material restricting upward movement of hydrogen from the second insulating material during said annealing;
• and
• after the annealing, forming a plurality of storage elements that are individually directly electrically coupled to individual of the conductive vias through the second insulating material.

Integrated circuitry comprising:

• conductive line structures having conductive vias laterally between and spaced longitudinally along immediately-adjacent of the conductive line structures, the conductive vias comprising uppermost conductive material that is above the conductive line structures;
• first insulating material laterally between immediately-adjacent of the conductive vias;
• second insulating material directly above the first insulating material and directly above the uppermost conductive material of the conductive vias;
• the second insulating material comprising silicon, carbon, nitrogen, and hydrogen;
• insulative material directly above the second insulating material, the insulative material and the second insulating material comprising different compositions relative one another;
• and
• a plurality of electronic components above the insulative material that individually are directly electrically coupled to individual of the conductive vias through the insulative material and the second insulating material.

DRAM circuitry, comprising:

• a substrate comprising transistors individually comprising:
• a pair of source/drain regions;
• a channel region between the pair of source/drain regions;
• and
• a conductive gate operatively proximate the channel region;
• digitline structures that are individually directly electrically coupled to one of the pair of source/drain regions of multiple of the transistors;
• conductive vias that are individually directly electrically coupled to one of the other source/drain regions of the multiple transistors;
• first insulating material laterally between immediately-adjacent of the conductive vias;
• second insulating material directly above the first insulating material and directly above the uppermost conductive material of the conductive vias;
• the second insulating material comprising silicon, carbon, nitrogen, and hydrogen;
• insulative material directly above the second insulating material, the insulative material and the second insulating material comprising different compositions relative one another;
• a plurality of electronic components above the insulative material that individually are directly electrically coupled to individual of the conductive vias through the insulative material and the second insulating material;
• and
• uppermost portions of the other source/drain regions comprising hydrogen.