Source/Drain Regions in Fin Field Effect Transistors (FinFETS) and Methods of Forming Same
AssigneeTaiwan Seminconductor Manufacturing Co., Ltd.
InventorsChe-Cheng Chang, Chih-Han Lin, Horng-Huei Tseng
Life of this patent
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Abstract
An embodiment method includes forming first dummy gate stack and a second dummy gate stack over a semiconductor fin. A portion of the semiconductor fin is exposed by an opening between the first dummy gate stack and the second dummy gate stack. The method further includes etching the portion of the semiconductor fin to extend the opening into the semiconductor fin. A material of the semiconductor fin encircles the opening in a top-down view of the semiconductor fin. The method further includes epitaxially growing a source/drain region in the opening on the portion of the semiconductor fin.
Claims20
A device comprising:
- a first semiconductor fin and a second semiconductor fin each extending upwards from a semiconductor substrate;
- a first gate stack over and extending along sidewalls of the first semiconductor fin;
- a second gate stack over and extending along sidewalls of the second semiconductor fin;
- an isolation region between the first semiconductor fin and the second semiconductor fin;
- a source/drain region adjacent the first gate stack, a bottom portion of the source/drain region extending into the first semiconductor fin, the first semiconductor fin surrounding at least the bottom portion of the source/drain region in a top down view;
- and
- a first dummy gate stack overlapping a first sidewall of the first semiconductor fin, the isolation region, and a second sidewall of the second semiconductor fin.
A device comprising:
- a first semiconductor fin;
- an isolation region surrounding the first semiconductor fin;
- a first gate stack over and extending along sidewalls of the first semiconductor fin;
- a dummy gate stack directly over the isolation region;
- a first gate spacer on a sidewall of the dummy gate stack and directly over the first semiconductor fin;
- and
- a first source/drain region extending into the first semiconductor fin, the first source/drain region being between the first gate stack and the dummy gate stack, and the first semiconductor fin surrounds at least a lower portion of the first source/drain region in a top-down view.
A method comprising:
- depositing an isolation material around a first semiconductor fin;
- forming a first gate stack over and along sidewalls of the first semiconductor fin;
- forming a dummy gate stack directly over the isolation material;
- forming a first gate spacer on a first sidewall of the dummy gate stack, the first gate spacer being directly over the first semiconductor fin;
- etching a source/drain opening in the first semiconductor fin through an opening between the first gate stack and the dummy gate stack;
- and
- forming a source/drain region in the source/drain opening.
Dependencies are inferred from the claim text.