Semiconductor package

A method of manufacturing a semiconductor package, the method comprising:

• forming a protective layer on a passivation layer and a connection pad of a semiconductor chip exposed by a first opening of the passivation layer;
• forming an insulating layer on the protective layer;
• forming a via hole penetrating the insulating layer to expose the protective layer;
• forming a second opening by removing a portion of the protective layer through the via hole;
• and
• forming a connection via filling the via hole and the second opening and a redistribution layer on the connection via,
• wherein the connection via has a portion having a width smaller than a width of an uppermost portion of the connection via in contact with the connection pad and a width of a lowermost portion of the connection via in contact with the redistribution layer,
• wherein the protective layer includes a bent portion in contact with the connection pad in the first opening.

A method of manufacturing a semiconductor package, the method comprising:

• forming a protective layer on a passivation layer and a connection pad of a semiconductor chip exposed by a first opening of the passivation layer;
• forming an insulating layer on the protective layer;
• forming a via hole penetrating the insulating layer to expose the protective layer;
• forming a second opening by removing a portion of the protective layer through the via hole;
• and
• forming a connection via filling the via hole and the second opening and a redistribution layer on the connection via,
• wherein the protective layer includes a bent portion in contact with the connection pad in the first opening,
• wherein a wall surface of the second opening is recessed toward a wall surface of the first opening to form a recessed region,
• wherein the recessed region is formed between the insulating layer and the connection pad, and
• wherein the connection via is formed to fill at least a portion of the recessed region.