Interposer and semiconductor package including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYu-Kyung PARK, Seung-kwan RYU, Min-seung YOON, Yun-seok CHOI
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AssigneeSamsung Electronics Co., Ltd.
InventorsYu-Kyung PARK, Seung-kwan RYU, Min-seung YOON, Yun-seok CHOI
Estimating the term…
An interposer includes: a base substrate; an interconnection structure on a top surface of the base substrate and including a metal interconnection pattern; an upper passivation layer on the interconnection structure and having compressive stress; a lower passivation layer under a bottom surface of base substrate, the lower passivation layer having compressive stress that is less than the compressive stress of the upper passivation layer; a lower conductive layer under the lower passivation layer; and a through electrode penetrating the base substrate and the lower passivation layer. The through electrode electrically connects the lower conductive layer to the metal interconnection pattern of the interconnection structure.
A method of manufacturing an interposer, the method comprising:
A method of manufacturing an interposer, the method comprising:
A method of manufacturing a semiconductor package, the method comprising:
Dependencies are inferred from the claim text.