Dielectric etch stop layer for reactive ion etch (rie) lag reduction and chamfer corner protection

Abstract

Stacked structures, process steps, and methods for via and trench formation use a dielectric etch stop layer (ESL) to reduce or eliminate problems, such as process lag and chamfer erosion, that occur during conventional etch processes. A stacked structure is formed that includes a dielectric ESL within a dielectric layer, such as a low-dielectric (low-K) layer, to form a first low-K layer below the dielectric ESL and a second low-K dielectric layer above the dielectric ESL. When the stacked structure is subsequently etched to form trenches as well as vias through the stacked structure to underlying layers, the dielectric ESL reduces or eliminates RIE lag by ensuring that trenches (regardless of width) stop on the dielectric ESL. The dielectric ESL also acts as a protective layer to protect corners from chamfer erosion during via and trench etch processes.

Dependencies are inferred from the claim text.